Use veriog language programming, fpga board control led lights

1led点亮实验
............\led
............\...\ipcore_dir
............\...\iseconfig
............\...\.........\led.projectmgr
............\...\.........\led.xreport
............\...\led.bgn
............\...\led.bit
............\...\led.bld
............\...\led.cmd_log
............\...\led.drc
............\...\led.gise
............\...\led.lso
............\...\led.ncd
............\...\led.ngc
............\...\led.ngd
............\...\led.ngr
............\...\led.pad
............\...\led.par
............\...\led.pcf
............\...\led.prj
............\...\led.ptwx
............\...\led.stx
............\...\led.syr
............\...\led.twr
............\...\led.twx
............\...\led.ucf
............\...\led.unroutes
............\...\led.ut
............\...\led.v
............\...\led.xise
............\...\led.xpi
............\...\led.xst
............\...\led_bitgen.xwbt
............\...\led_envsettings.html
............\...\led_guide.ncd
............\...\led_map.map
............\...\led_map.mrp
............\...\led_map.ncd
............\...\led_map.ngm
............\...\led_map.xrpt
............\...\led_ngdbuild.xrpt
............\...\led_pad.csv
............\...\led_pad.txt
............\...\led_par.xrpt
............\...\led_summary.html
............\...\led_summary.xml
............\...\led_usage.xml
............\...\led_xst.xrpt
............\...\pa.fromNetlist.tcl
............\...\planAhead.ngc2edif.log
............\...\planAhead_run_1
............\...\...............\led.data
............\...\...............\........\constrs_1
............\...\...............\........\.........\designprops.xml
............\...\...............\........\.........\fileset.xml
............\...\...............\........\.........\usercols.xml
............\...\...............\........\runs
............\...\...............\........\....\impl_1.psg
............\...\...............\........\....\runs.xml
............\...\...............\........\sources_1
............\...\...............\........\.........\chipscope.xml
............\...\...............\........\.........\fileset.xml
............\...\...............\........\.........\ports.xml
............\...\...............\........\wt
............\...\...............\........\..\webtalk_pa.xml
............\...\...............\led.ppr
............\...\...............\planAhead.jou
............\...\...............\planAhead.log
............\...\...............\planAhead_run.log
............\...\prom_config_files.cfi
............\...\prom_config_files.mcs
............\...\prom_config_files.prm
............\...\prom_config_files.sig
............\...\webtalk.log
............\...\webtalk_pn.xml
............\...\xlnx_auto_0_xdb
............\...\...............\cst.xbcd
............\...\xst
............\...\...\dump.xst
............\...\...\........\led.prj
............\...\...\........\.......\ngx
............\...\...\........\.......\...\notopt
............\...\...\........\.......\...\opt
............\...\...\projnav.tmp
............\...\...\work
............\...\...\....\hdllib.ref
............\...\...\....\vlg69
............\...\...\....\.....\led.bin
............\...\_ngo
............\...\....\netlist.lst
............\...\_xmsgs
............\...\......\bitgen.xmsgs
............\...\......\map.xmsgs
............\...\......\ngdbuild.xmsgs
............\...\......\par.xmsgs
............\...\......\pn_parser.xmsgs
............\...\......\trce.xmsgs
............\...\......\xst.xmsgs
............\readme.txt

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