Based EP1C12Q240C8 a red hurricane II FPGA development board SDRAM test program, containing written and read FIFO, serial UART, data generation module.

SDRAM_Test5
...........\pro
...........\...\db
...........\...\..\add_sub_918.tdf
...........\...\..\add_sub_se8.tdf
...........\...\..\altsyncram_0l14.tdf
...........\...\..\altsyncram_0o14.tdf
...........\...\..\altsyncram_1l14.tdf
...........\...\..\altsyncram_1lh1.tdf
...........\...\..\altsyncram_2l14.tdf
...........\...\..\altsyncram_2o14.tdf
...........\...\..\altsyncram_3l14.tdf
...........\...\..\altsyncram_4l14.tdf
...........\...\..\altsyncram_5l14.tdf
...........\...\..\altsyncram_6l14.tdf
...........\...\..\altsyncram_7l14.tdf
...........\...\..\altsyncram_8l14.tdf
...........\...\..\altsyncram_8o14.tdf
...........\...\..\altsyncram_al14.tdf
...........\...\..\altsyncram_kbv3.tdf
...........\...\..\altsyncram_qk14.tdf
...........\...\..\altsyncram_s8v3.tdf
...........\...\..\altsyncram_sk14.tdf
...........\...\..\altsyncram_tk14.tdf
...........\...\..\altsyncram_uk14.tdf
...........\...\..\altsyncram_vk14.tdf
...........\...\..\alt_sync_fifo_uni.tdf
...........\...\..\cmpr_j4c.tdf
...........\...\..\cmpr_m4c.tdf
...........\...\..\cmpr_n4c.tdf
...........\...\..\cmpr_o4c.tdf
...........\...\..\cmpr_p4c.tdf
...........\...\..\cmpr_q4c.tdf
...........\...\..\cntr_06i.tdf
...........\...\..\cntr_36i.tdf
...........\...\..\cntr_4ti.tdf
...........\...\..\cntr_74i.tdf
...........\...\..\cntr_84i.tdf
...........\...\..\cntr_94i.tdf
...........\...\..\cntr_a4i.tdf
...........\...\..\cntr_b4i.tdf
...........\...\..\cntr_c4i.tdf
...........\...\..\cntr_cti.tdf
...........\...\..\cntr_d4i.tdf
...........\...\..\cntr_e4i.tdf
...........\...\..\cntr_f4i.tdf
...........\...\..\cntr_g4i.tdf
...........\...\..\cntr_h4i.tdf
...........\...\..\cntr_i4i.tdf
...........\...\..\cntr_iti.tdf
...........\...\..\cntr_j4i.tdf
...........\...\..\cntr_k4i.tdf
...........\...\..\cntr_kti.tdf
...........\...\..\cntr_kua.tdf
...........\...\..\cntr_l4i.tdf
...........\...\..\cntr_m4i.tdf
...........\...\..\cntr_n4i.tdf
...........\...\..\cntr_umi.tdf
...........\...\..\cntr_v5i.tdf
...........\...\..\dcfifo_k2l1.tdf
...........\...\..\decode_9jf.tdf
...........\...\..\decode_fga.tdf
...........\...\..\decode_iga.tdf
...........\...\..\decode_nga.tdf
...........\...\..\dpram_4o31.tdf
...........\...\..\logic_util_heursitic.dat
...........\...\..\mux_5eb.tdf
...........\...\..\mux_dcb.tdf
...........\...\..\mux_lgc.tdf
...........\...\..\mux_ngc.tdf
...........\...\..\mux_ocb.tdf
...........\...\..\mux_pgc.tdf
...........\...\..\mux_rgc.tdf
...........\...\..\prev_cmp_sdr_test.qmsg
...........\...\..\sdr_test.amm.cdb
...........\...\..\sdr_test.asm.qmsg
...........\...\..\sdr_test.asm.rdb
...........\...\..\sdr_test.cbx.xml
...........\...\..\sdr_test.cmp.bpm
...........\...\..\sdr_test.cmp.cdb
...........\...\..\sdr_test.cmp.hdb
...........\...\..\sdr_test.cmp.kpt
...........\...\..\sdr_test.cmp.logdb
...........\...\..\sdr_test.cmp.rdb
...........\...\..\sdr_test.cmp0.ddb
...........\...\..\sdr_test.cmp_merge.kpt
...........\...\..\sdr_test.db_info
...........\...\..\sdr_test.fit.qmsg
...........\...\..\sdr_test.hier_info
...........\...\..\sdr_test.hif
...........\...\..\sdr_test.idb.cdb
...........\...\..\sdr_test.lpc.html
...........\...\..\sdr_test.lpc.rdb
...........\...\..\sdr_test.lpc.txt
...........\...\..\sdr_test.map.bpm
...........\...\..\sdr_test.map.cdb
...........\...\..\sdr_test.map.hdb
...........\...\..\sdr_test.map.kpt
...........\...\..\sdr_test.map.logdb
...........\...\..\sdr_test.map.qmsg

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