Electronic Design Contest, the microcontroller and FPGA serial communication program, more stable performance tested

edc_spi
.......\AD_control.vhd
.......\DA_control.vhd
.......\_ngo
.......\....\netlist.lst
.......\_xmsgs
.......\......\bitgen.xmsgs
.......\......\map.xmsgs
.......\......\ngdbuild.xmsgs
.......\......\par.xmsgs
.......\......\pn_parser.xmsgs
.......\......\trce.xmsgs
.......\......\xst.xmsgs
.......\dds_freq.vhd
.......\dds_ip.cdc
.......\edc_spi.gise
.......\edc_spi.xise
.......\ipcore_dir
.......\..........\.lso
.......\..........\_xmsgs
.......\..........\......\cg.xmsgs
.......\..........\......\pn_parser.xmsgs
.......\..........\clock_wizard
.......\..........\............\clk_wiz_v3_6_readme.txt
.......\..........\............\doc
.......\..........\............\...\clk_wiz_v3_6_readme.txt
.......\..........\............\...\clk_wiz_v3_6_vinfo.html
.......\..........\............\...\pg065_clk_wiz.pdf
.......\..........\............\example_design
.......\..........\............\..............\clock_wizard_exdes.ucf
.......\..........\............\..............\clock_wizard_exdes.vhd
.......\..........\............\..............\clock_wizard_exdes.xdc
.......\..........\............\implement
.......\..........\............\.........\implement.bat
.......\..........\............\.........\implement.sh
.......\..........\............\.........\planAhead_ise.bat
.......\..........\............\.........\planAhead_ise.sh
.......\..........\............\.........\planAhead_ise.tcl
.......\..........\............\.........\planAhead_rdn.bat
.......\..........\............\.........\planAhead_rdn.sh
.......\..........\............\.........\planAhead_rdn.tcl
.......\..........\............\.........\xst.prj
.......\..........\............\.........\xst.scr
.......\..........\............\simulation
.......\..........\............\..........\clock_wizard_tb.vhd
.......\..........\............\..........\functional
.......\..........\............\..........\..........\simcmds.tcl
.......\..........\............\..........\..........\simulate_isim.bat
.......\..........\............\..........\..........\simulate_isim.sh
.......\..........\............\..........\..........\simulate_mti.bat
.......\..........\............\..........\..........\simulate_mti.do
.......\..........\............\..........\..........\simulate_mti.sh
.......\..........\............\..........\..........\simulate_ncsim.sh
.......\..........\............\..........\..........\simulate_vcs.sh
.......\..........\............\..........\..........\wave.do
.......\..........\............\..........\..........\wave.sv
.......\..........\............\..........\timing
.......\..........\............\..........\......\clock_wizard_tb.vhd
.......\..........\............\..........\......\sdf_cmd_file
.......\..........\............\..........\......\simcmds.tcl
.......\..........\............\..........\......\simulate_isim.sh
.......\..........\............\..........\......\simulate_mti.bat
.......\..........\............\..........\......\simulate_mti.do
.......\..........\............\..........\......\simulate_mti.sh
.......\..........\............\..........\......\simulate_ncsim.sh
.......\..........\............\..........\......\simulate_vcs.sh
.......\..........\............\..........\......\ucli_commands.key
.......\..........\............\..........\......\vcs_session.tcl
.......\..........\............\..........\......\wave.do
.......\..........\clock_wizard.asy
.......\..........\clock_wizard.gise
.......\..........\clock_wizard.sym
.......\..........\clock_wizard.ucf
.......\..........\clock_wizard.vhd
.......\..........\clock_wizard.vho
.......\..........\clock_wizard.xco
.......\..........\clock_wizard.xdc
.......\..........\clock_wizard.xise
.......\..........\clock_wizard_exdes.ncf
.......\..........\clock_wizard_flist.txt
.......\..........\clock_wizard_xmdf.tcl
.......\..........\coregen.cgp
.......\..........\coregen.log
.......\..........\create_aa.tcl
.......\..........\create_clock_wizard.tcl
.......\..........\create_dds_ip.tcl
.......\..........\create_diver.tcl
.......\..........\create_fft.tcl
.......\..........\cre

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