Using xilinx ISE 14.3 development of multi-cycle CPU system, development language for verilog HDL. Simulation debugging and practical tests have passed

multi_cpu_3110104501\.lso
....................\alu.v
....................\aluctr.v
....................\ALUnit.v
....................\alu_oritest.v
....................\alu_wrapper.v
....................\coregen_xil_5216_19.cgc
....................\coregen_xil_5216_19.cgp
....................\counter_1s.v
....................\ctrl.prj
....................\ctrl.stx
....................\ctrl.v
....................\ctrl.xst
....................\display.v
....................\display32bits.v
....................\fuse.log
....................\fuse.xmsgs
....................\fuseRelaunch.cmd
....................\gpr.v
....................\ipcore_dir\blk_mem_gen_ds512.pdf
....................\..........\blk_mem_gen_readme.txt
....................\..........\coregen.cgc
....................\..........\coregen.cgp
....................\..........\coregen.log
....................\..........\coregen.rsp
....................\..........\memory.asy
....................\..........\memory.gise
....................\..........\memory.mif
....................\..........\memory.ncf
....................\..........\memory.ngc
....................\..........\memory.sym
....................\..........\memory.v
....................\..........\memory.veo
....................\..........\memory.vhd
....................\..........\memory.vho
....................\..........\memory.xco
....................\..........\memory.xco.bak
....................\..........\memory.xise
....................\..........\memorysimple.asy
....................\..........\memorysimple.gise
....................\..........\memorysimple.mif
....................\..........\memorysimple.ngc
....................\..........\memorysimple.sym
....................\..........\memorysimple.v
....................\..........\memorysimple.veo
....................\..........\memorysimple.vhd
....................\..........\memorysimple.vho
....................\..........\memorysimple.xco
....................\..........\memorysimple.xise
....................\..........\memorysimple_flist.txt
....................\..........\memorysimple_xmdf.tcl
....................\..........\memory_flist.txt
....................\..........\memory_xmdf.tcl
....................\..........\_xmsgs\ngcbuild.xmsgs
....................\..........\......\pn_parser.xmsgs
....................\..........\......\xst.xmsgs
....................\.seconfig\multi_cpu_3110104501.projectmgr
....................\.........\multi_cpu_top.xreport
....................\.........\pbdebounce.xreport
....................\..im\isim_usage_statistics.html
....................\....\pn_info
....................\....\temp\alu.sdb
....................\....\....\alu_wrapper.sdb
....................\....\....\ctrl.sdb
....................\....\....\display.sdb
....................\....\....\display32bits.sdb
....................\....\....\glbl.sdb
....................\....\....\memory.sdb
....................\....\....\memorysimple.sdb
....................\....\....\regs.sdb
....................\....\....\testmt_sim.sdb
....................\....\....\testmultitop.sdb
....................\....\..stmemsin_isim_beh.exe.sim\isimcrash.log
....................\....\...........................\ISimEngine-DesignHierarchy.dbg
....................\....\...........................\isimkernel.log
....................\....\...........................\netId.dat
....................\....\...........................\testmemsin_isim_beh.exe
....................\....\...........................\.mp_save\_1
....................\....\...........................\work\m_00000000003324198333_2700776020.c
....................\....\...........................\....\m_00000000003324198333_2700776020.didat
....................\....\...........................\....\m_00000000003324198333_2700776020.nt.obj
....................\....\...........................\....\m_00000000003617557875_3532342300.c
....................\....\...........................\....\m_00000000003617557875_3532342300.didat
....................\....\...........................\....\m_0000000

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