Analog-to-digital conversion, eight road parallel data cached in FIFO, and output. By sequential control of A/D chip acquisition speed, and ARM board receives the speed.

模数转换（源）\.sopc_builder\install.ptf
..............\1.vwf
..............\db\add_sub_2nh.tdf
..............\..\add_sub_3nh.tdf
..............\..\add_sub_7nh.tdf
..............\..\add_sub_9qb.tdf
..............\..\add_sub_olh.tdf
..............\..\add_sub_vob.tdf
..............\..\altsyncram_1pb2.tdf
..............\..\altsyncram_25s.tdf
..............\..\altsyncram_7a71.tdf
..............\..\altsyncram_tob2.tdf
..............\..\alt_synch_pipe_0e8.tdf
..............\..\alt_synch_pipe_1e8.tdf
..............\..\alt_synch_pipe_2e8.tdf
..............\..\alt_synch_pipe_nc8.tdf
..............\..\alt_synch_pipe_oc8.tdf
..............\..\alt_synch_pipe_vd8.tdf
..............\..\a_fefifo_76d.tdf
..............\..\a_fefifo_c6d.tdf
..............\..\a_fefifo_gtc.tdf
..............\..\a_fefifo_knc.tdf
..............\..\a_fefifo_ltc.tdf
..............\..\a_fefifo_tjc.tdf
..............\..\a_gray2bin_9va.tdf
..............\..\a_gray2bin_j0b.tdf
..............\..\a_graycounter_8k6.tdf
..............\..\a_graycounter_dr5.tdf
..............\..\a_graycounter_il6.tdf
..............\..\a_graycounter_k27.tdf
..............\..\a_graycounter_ns5.tdf
..............\..\a_graycounter_p96.tdf
..............\..\cmpr_nth.tdf
..............\..\cntr_6sb.tdf
..............\..\cntr_7jc.tdf
..............\..\cntr_hqa.tdf
..............\..\cntr_igb.tdf
..............\..\cntr_jqa.tdf
..............\..\cntr_smd.tdf
..............\..\dcfifo_2d21.tdf
..............\..\dcfifo_4q21.tdf
..............\..\dcfifo_rke1.tdf
..............\..\dcfifo_sna1.tdf
..............\..\decode_rpe.tdf
..............\..\dffpipe_fd9.tdf
..............\..\dffpipe_hd9.tdf
..............\..\dffpipe_id9.tdf
..............\..\dffpipe_pe9.tdf
..............\..\dffpipe_qe9.tdf
..............\..\dffpipe_re9.tdf
..............\..\dffpipe_se9.tdf
..............\..\dffpipe_te9.tdf
..............\..\echoaddsp1.asm.qmsg
..............\..\echoaddsp1.cbx.xml
..............\..\echoaddsp1.cmp.cdb
..............\..\echoaddsp1.cmp.hdb
..............\..\echoaddsp1.cmp.logdb
..............\..\echoaddsp1.cmp.rdb
..............\..\echoaddsp1.cmp.tdb
..............\..\echoaddsp1.cmp0.ddb
..............\..\echoaddsp1.db_info
..............\..\echoaddsp1.eco.cdb
..............\..\echoaddsp1.eda.qmsg
..............\..\echoaddsp1.eds_overflow
..............\..\echoaddsp1.fit.qmsg
..............\..\echoaddsp1.hier_info
..............\..\echoaddsp1.hif
..............\..\echoaddsp1.lpc.html
..............\..\echoaddsp1.lpc.rdb
..............\..\echoaddsp1.lpc.txt
..............\..\echoaddsp1.map.cdb
..............\..\echoaddsp1.map.hdb
..............\..\echoaddsp1.map.logdb
..............\..\echoaddsp1.map.qmsg
..............\..\echoaddsp1.pre_map.cdb
..............\..\echoaddsp1.pre_map.hdb
..............\..\echoaddsp1.rpp.qmsg
..............\..\echoaddsp1.rtlv.hdb
..............\..\echoaddsp1.rtlv_sg.cdb
..............\..\echoaddsp1.rtlv_sg_swap.cdb
..............\..\echoaddsp1.sgate.rvd
..............\..\echoaddsp1.sgate_sm.rvd
..............\..\echoaddsp1.sgdiff.cdb
..............\..\echoaddsp1.sgdiff.hdb
..............\..\echoaddsp1.sim.cvwf
..............\..\echoaddsp1.sim.hdb
..............\..\echoaddsp1.sim.qmsg
..............\..\echoaddsp1.sim.rdb
..............\..\echoaddsp1.sim.vwf
..............\..\echoaddsp1.sld_design_entry.sci
..............\..\echoaddsp1.sld_design_entry_dsc.sci
..............\..\echoaddsp1.syn_hier_info
..............\..\echoaddsp1.tan.qmsg
..............\..\echoaddsp1.tis_db_list.ddb
..............\..\prev_cmp_echoaddsp1.asm.qmsg
..............\..\prev_cmp_echoaddsp1.eda.qmsg
..............\..\prev_cmp_echoaddsp1.fit.qmsg
..............\..\prev_cmp_echoaddsp1.map.qmsg
..............\..\prev_cmp_echoaddsp1.qmsg
..............\..\prev_cmp_echoaddsp1.sim.qmsg

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