cpld fpga 程序 vhld程序 lcd显示 代码

LCD_VHDL
........\char_ram.vhd
........\db
........\..\LCD_VHDL.asm.qmsg
........\..\LCD_VHDL.asm_labs.ddb
........\..\LCD_VHDL.cbx.xml
........\..\LCD_VHDL.cmp.cdb
........\..\LCD_VHDL.cmp.hdb
........\..\LCD_VHDL.cmp.qrpt
........\..\LCD_VHDL.cmp.rdb
........\..\LCD_VHDL.cmp.tdb
........\..\LCD_VHDL.cmp0.ddb
........\..\LCD_VHDL.dbp
........\..\LCD_VHDL.db_info
........\..\LCD_VHDL.eco.cdb
........\..\LCD_VHDL.fit.qmsg
........\..\LCD_VHDL.hier_info
........\..\LCD_VHDL.hif
........\..\LCD_VHDL.map.cdb
........\..\LCD_VHDL.map.hdb
........\..\LCD_VHDL.map.qmsg
........\..\LCD_VHDL.pre_map.cdb
........\..\LCD_VHDL.pre_map.hdb
........\..\LCD_VHDL.psp
........\..\LCD_VHDL.rtlv.hdb
........\..\LCD_VHDL.rtlv_sg.cdb
........\..\LCD_VHDL.rtlv_sg_swap.cdb
........\..\LCD_VHDL.sgdiff.cdb
........\..\LCD_VHDL.sgdiff.hdb
........\..\LCD_VHDL.signalprobe.cdb
........\..\LCD_VHDL.sld_design_entry.sci
........\..\LCD_VHDL.sld_design_entry_dsc.sci
........\..\LCD_VHDL.syn_hier_info
........\..\LCD_VHDL.tan.qmsg
........\lcd.bsf
........\lcd.vhd
........\LCD_VHDL.asm.rpt
........\LCD_VHDL.bdf
........\LCD_VHDL.cdf
........\LCD_VHDL.done
........\LCD_VHDL.fit.eqn
........\LCD_VHDL.fit.rpt
........\LCD_VHDL.fit.summary
........\LCD_VHDL.flow.rpt
........\LCD_VHDL.map.eqn
........\LCD_VHDL.map.rpt
........\LCD_VHDL.map.summary
........\LCD_VHDL.pin
........\LCD_VHDL.pof
........\LCD_VHDL.qpf
........\LCD_VHDL.qsf
........\LCD_VHDL.qws
........\LCD_VHDL.tan.rpt
........\LCD_VHDL.tan.summary
........\setup.tcl

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