Using verilog language targeting program, with four generations of black gold development board, VGA screen flashes RBI. RBI coordinates can be self-set can also be used by the peripheral to.

daba\1.mif
....\babiao.mif
....\babiao_1.mif
....\babiao_rom.bsf
....\babiao_VGA_fengzhuang.bdf
....\babiao_VGA_fengzhuang.bsf
....\cam_vga_control_module.bsf
....\cam_vga_control_module.v
....\cam_vga_control_module.v.bak
....\check.bsf
....\check.v
....\check.v.bak
....\db\add_sub_lgh.tdf
....\..\add_sub_ngh.tdf
....\..\add_sub_pgh.tdf
....\..\add_sub_rgh.tdf
....\..\altsyncram_5hj1.tdf
....\..\altsyncram_5rh1.tdf
....\..\altsyncram_72a1.tdf
....\..\altsyncram_7dq1.tdf
....\..\altsyncram_8ng1.tdf
....\..\altsyncram_arh1.tdf
....\..\altsyncram_b061.tdf
....\..\altsyncram_cng1.tdf
....\..\altsyncram_dvf1.tdf
....\..\altsyncram_e3h1.tdf
....\..\altsyncram_fbm1.tdf
....\..\altsyncram_frc1.tdf
....\..\altsyncram_gbm1.tdf
....\..\altsyncram_gkg1.tdf
....\..\altsyncram_kgm1.tdf
....\..\altsyncram_lom1.tdf
....\..\altsyncram_n6a1.tdf
....\..\altsyncram_qg91.tdf
....\..\altsyncram_ram1.tdf
....\..\altsyncram_slb1.tdf
....\..\altsyncram_thq1.tdf
....\..\altsyncram_u9g1.tdf
....\..\altsyncram_vsa1.tdf
....\..\decode_f8a.tdf
....\..\decode_h8a.tdf
....\..\decode_k8a.tdf
....\..\decode_m8a.tdf
....\..\decode_msa.tdf
....\..\decode_osa.tdf
....\..\decode_rsa.tdf
....\..\decode_tsa.tdf
....\..\dpram_9q61.tdf
....\..\logic_util_heursitic.dat
....\..\mux_4nb.tdf
....\..\mux_6nb.tdf
....\..\mux_8nb.tdf
....\..\mux_bnb.tdf
....\..\mux_dnb.tdf
....\..\PLL_1K_altpll.v
....\..\pll_200m_altpll.v
....\..\pll_200m_altpll1.v
....\..\pll_2M_altpll.v
....\..\pll_65m_altpll.v
....\..\pll_module_altpll.v
....\..\prev_cmp_vga_module_pic.qmsg
....\..\vga_module_pic.amm.cdb
....\..\vga_module_pic.asm.qmsg
....\..\vga_module_pic.asm.rdb
....\..\vga_module_pic.asm_labs.ddb
....\..\vga_module_pic.cbx.xml
....\..\vga_module_pic.cmp.bpm
....\..\vga_module_pic.cmp.cdb
....\..\vga_module_pic.cmp.hdb
....\..\vga_module_pic.cmp.kpt
....\..\vga_module_pic.cmp.logdb
....\..\vga_module_pic.cmp.rdb
....\..\vga_module_pic.cmp_merge.kpt
....\..\vga_module_pic.cycloneive_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
....\..\vga_module_pic.cycloneive_io_sim_cache.31um_ss_1200mv_0c_slow.hsd
....\..\vga_module_pic.cycloneive_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
....\..\vga_module_pic.db_info
....\..\vga_module_pic.fit.qmsg
....\..\vga_module_pic.hier_info
....\..\vga_module_pic.hif
....\..\vga_module_pic.idb.cdb
....\..\vga_module_pic.lpc.html
....\..\vga_module_pic.lpc.rdb
....\..\vga_module_pic.lpc.txt
....\..\vga_module_pic.map.bpm
....\..\vga_module_pic.map.cdb
....\..\vga_module_pic.map.hdb
....\..\vga_module_pic.map.kpt
....\..\vga_module_pic.map.logdb
....\..\vga_module_pic.map.qmsg
....\..\vga_module_pic.map_bb.cdb
....\..\vga_module_pic.map_bb.hdb
....\..\vga_module_pic.map_bb.logdb
....\..\vga_module_pic.pre_map.cdb
....\..\vga_module_pic.pre_map.hdb
....\..\vga_module_pic.rtlv.hdb
....\..\vga_module_pic.rtlv_sg.cdb
....\..\vga_module_pic.rtlv_sg_swap.cdb
....\..\vga_module_pic.sgdiff.cdb
....\..\vga_module_pic.sgdiff.hdb

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