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Experiment09

  • Category : VHDL-FPGA-Verilog
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  • Update : 2013-07-24
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Introduction - If you have any usage issues, please Google them yourself
FPGA using verilog language VGA driver program, using the development platform for quartus 11.0
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Experiment09\01-vga_module\db\logic_util_heursitic.dat
............\.............\..\vga_module.ae.hdb
............\.............\..\vga_module.cbx.xml
............\.............\..\vga_module.cmp.rdb
............\.............\..\vga_module.db_info
............\.............\..\vga_module.hier_info
............\.............\..\vga_module.hif
............\.............\..\vga_module.lpc.html
............\.............\..\vga_module.lpc.rdb
............\.............\..\vga_module.lpc.txt
............\.............\..\vga_module.map.qmsg
............\.............\..\vga_module.pre_map.cdb
............\.............\..\vga_module.pre_map.hdb
............\.............\..\vga_module.rpp.qmsg
............\.............\..\vga_module.rtlv.hdb
............\.............\..\vga_module.rtlv_sg.cdb
............\.............\..\vga_module.rtlv_sg_swap.cdb
............\.............\..\vga_module.sgate.rvd
............\.............\..\vga_module.sgate_sm.rvd
............\.............\..\vga_module.sld_design_entry.sci
............\.............\..\vga_module.sld_design_entry_dsc.sci
............\.............\..\vga_module.smart_action.txt
............\.............\..\vga_module.tmw_info
............\.............\greybox_tmp\cbx_args.txt
............\.............\incremental_db\compiled_partitions\vga_module.db_info
............\.............\pll_module\greybox_tmp\cbx_args.txt
............\.............\..........\pll_module.ppf
............\.............\..........\pll_module.qip
............\.............\..........\pll_module.v
............\.............\..........\pll_module_bb.v
............\.............\..........\pll_module_inst.v
............\.............\pll_module.qip
............\.............\sync_module\sync_module.v
............\.............\...........\sync_module.v.bak
............\.............\...........\transcript
............\.............\vga_control_module\vga_control_module.v
............\.............\..................\vga_control_module.v.bak
............\.............\vga_module.asm.rpt
............\.............\vga_module.cdf
............\.............\vga_module.done
............\.............\vga_module.dpf
............\.............\vga_module.fit.rpt
............\.............\vga_module.fit.summary
............\.............\vga_module.flow.rpt
............\.............\vga_module.map.rpt
............\.............\vga_module.map.summary
............\.............\vga_module.pin
............\.............\vga_module.pof
............\.............\vga_module.qpf
............\.............\vga_module.qsf
............\.............\vga_module.qws
............\.............\vga_module.sof
............\.............\vga_module.tan.rpt
............\.............\vga_module.tan.summary
............\.............\vga_module.v
............\.............\vga_module.v.bak
............\.............\vga_module_assignment_defaults.qdf
............\.2-vga_module_64048060\db\vga_module.db_info
............\......................\..\vga_module.sld_design_entry.sci
............\......................\greybox_tmp\cbx_args.txt
............\......................\pll_module\greybox_tmp\cbx_args.txt
............\......................\..........\pll_module.ppf
............\......................\..........\pll_module.qip
............\......................\..........\pll_module.v
............\......................\..........\pll_module_bb.v
............\......................\..........\pll_module_inst.v
............\......................\pll_module.qip
............\......................\sync_module\sync_module.v
............\......................\...........\sync_module.v.bak
............\......................\vga_control_module\vga_control_module.v
............\......................\..................\vga_control_module.v.bak
............\......................\vga_module.asm.rpt
............\......................\vga_module.cdf
............\......................\vga_module.done
............\......................\vga_module.dpf
............\......................\vga_module.fit.rpt
........
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