Simple verilog based logic analyzer, has been testing

luojiyi_demo\db\altsyncram_2jg1.tdf
............\..\altsyncram_8mk1.tdf
............\..\luojiyi_demo.asm.qmsg
............\..\luojiyi_demo.cbx.xml
............\..\luojiyi_demo.cmp.bpm
............\..\luojiyi_demo.cmp.cdb
............\..\luojiyi_demo.cmp.ecobp
............\..\luojiyi_demo.cmp.hdb
............\..\luojiyi_demo.cmp.kpt
............\..\luojiyi_demo.cmp.logdb
............\..\luojiyi_demo.cmp.rdb
............\..\luojiyi_demo.cmp.tdb
............\..\luojiyi_demo.cmp0.ddb
............\..\luojiyi_demo.cmp_merge.kpt
............\..\luojiyi_demo.db_info
............\..\luojiyi_demo.eco.cdb
............\..\luojiyi_demo.fit.qmsg
............\..\luojiyi_demo.hier_info
............\..\luojiyi_demo.hif
............\..\luojiyi_demo.lpc.html
............\..\luojiyi_demo.lpc.rdb
............\..\luojiyi_demo.lpc.txt
............\..\luojiyi_demo.map.bpm
............\..\luojiyi_demo.map.cdb
............\..\luojiyi_demo.map.ecobp
............\..\luojiyi_demo.map.hdb
............\..\luojiyi_demo.map.kpt
............\..\luojiyi_demo.map.logdb
............\..\luojiyi_demo.map.qmsg
............\..\luojiyi_demo.map_bb.cdb
............\..\luojiyi_demo.map_bb.hdb
............\..\luojiyi_demo.map_bb.logdb
............\..\luojiyi_demo.pre_map.cdb
............\..\luojiyi_demo.pre_map.hdb
............\..\luojiyi_demo.rtlv.hdb
............\..\luojiyi_demo.rtlv_sg.cdb
............\..\luojiyi_demo.rtlv_sg_swap.cdb
............\..\luojiyi_demo.sgdiff.cdb
............\..\luojiyi_demo.sgdiff.hdb
............\..\luojiyi_demo.sld_design_entry.sci
............\..\luojiyi_demo.sld_design_entry_dsc.sci
............\..\luojiyi_demo.syn_hier_info
............\..\luojiyi_demo.tan.qmsg
............\..\luojiyi_demo.tis_db_list.ddb
............\..\luojiyi_demo.tmw_info
............\..\luojiyi_demo_global_asgn_op.abo
............\..\prev_cmp_luojiyi_demo.asm.qmsg
............\..\prev_cmp_luojiyi_demo.fit.qmsg
............\..\prev_cmp_luojiyi_demo.map.qmsg
............\..\prev_cmp_luojiyi_demo.qmsg
............\..\prev_cmp_luojiyi_demo.tan.qmsg
............\dpram256x12.cmp
............\dpram256x12.qip
............\dpram256x12.v
............\dpram256x12.vhd
............\dpram256x12_bb.v
............\dpram256x12_wave0.jpg
............\dpram256x12_wave1.jpg
............\dpram256x12_waveforms.html
............\incremental_db\compiled_partitions\luojiyi_demo.root_partition.cmp.atm
............\..............\...................\luojiyi_demo.root_partition.cmp.dfp
............\..............\...................\luojiyi_demo.root_partition.cmp.hdbx
............\..............\...................\luojiyi_demo.root_partition.cmp.kpt
............\..............\...................\luojiyi_demo.root_partition.cmp.logdb
............\..............\...................\luojiyi_demo.root_partition.cmp.rcf
............\..............\...................\luojiyi_demo.root_partition.map.atm
............\..............\...................\luojiyi_demo.root_partition.map.dpi
............\..............\...................\luojiyi_demo.root_partition.map.hdbx
............\..............\...................\luojiyi_demo.root_partition.map.kpt
............\..............\README
............\luojiyi_demo.asm.rpt
............\luojiyi_demo.done
............\luojiyi_demo.fit.rpt
............\luojiyi_demo.fit.smsg
............\luojiyi_demo.fit.summary
............\luojiyi_demo.flow.rpt
............\luojiyi_demo.map.rpt
............\luojiyi_demo.map.summary
............\luojiyi_demo.pin
............\luojiyi_demo.pof
............\luojiyi_demo.qpf
............\luojiyi_demo.qsf
............\luojiyi_demo.qws
............\luojiyi_demo.sof
............\luojiyi_demo.tan.rpt
............\luojiyi_demo.tan.summary
............\topdesign.v
............\topdesign.v.bak
............\incremental_db\compiled_partitions
............\db
............\incremental_db
luojiyi_demo

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