The source is mainly realize the function of phase-locked loop, phase-locked loop consists of input, phase discriminator, loop filter and the voltage-controlled oscillator, as well as the feedback signal, our purpose is to realize the input signal and synchronization of feedback signal, therefore, describes how the source code for tracking the signals are analyzed, capture and lock, finally make its input/output synchronization.

test_pll_1\db\prev_cmp_test_pll_1.map.qmsg
..........\..\prev_cmp_test_pll_1.qmsg
..........\..\test_pll_1.cbx.xml
..........\..\test_pll_1.cmp.rdb
..........\..\test_pll_1.cmp_merge.kpt
..........\..\test_pll_1.db_info
..........\..\test_pll_1.eco.cdb
..........\..\test_pll_1.hier_info
..........\..\test_pll_1.hif
..........\..\test_pll_1.lpc.html
..........\..\test_pll_1.lpc.rdb
..........\..\test_pll_1.lpc.txt
..........\..\test_pll_1.map.ecobp
..........\..\test_pll_1.map.kpt
..........\..\test_pll_1.map.qmsg
..........\..\test_pll_1.map_bb.hdb
..........\..\test_pll_1.pre_map.cdb
..........\..\test_pll_1.pre_map.hdb
..........\..\test_pll_1.rtlv.hdb
..........\..\test_pll_1.rtlv_sg.cdb
..........\..\test_pll_1.rtlv_sg_swap.cdb
..........\..\test_pll_1.sgdiff.cdb
..........\..\test_pll_1.sgdiff.hdb
..........\..\test_pll_1.sld_design_entry.sci
..........\..\test_pll_1.sld_design_entry_dsc.sci
..........\..\test_pll_1.syn_hier_info
..........\..\test_pll_1.tis_db_list.ddb
..........\incremental_db\compiled_partitions\test_pll_1.root_partition.map.atm
..........\..............\...................\test_pll_1.root_partition.map.dpi
..........\..............\...................\test_pll_1.root_partition.map.hdbx
..........\..............\...................\test_pll_1.root_partition.map.kpt
..........\..............\...................\test_pll_1.root_partition.merge_hb.atm
..........\..............\README
..........\test_pll_1.bdf
..........\test_pll_1.bsf
..........\test_pll_1.done
..........\test_pll_1.flow.rpt
..........\test_pll_1.map.rpt
..........\test_pll_1.map.summary
..........\test_pll_1.qpf
..........\test_pll_1.qsf
..........\test_pll_1.qws
..........\test_pll_1.v
..........\test_pll_1.v.bak
..........\test_pll_2.v
..........\test_pll_2.v.bak
..........\incremental_db\compiled_partitions
..........\db
..........\incremental_db
test_pll_1

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