This a verilog code for PLL, including transmitor, PDF, Filter, VCO and so on. It mainly realize the input and output signal tracking, capture and lock, make the input and output signal in a relatively short period of time to achieve synchronization.

test_pll_2\Block1.bdf
..........\db\prev_cmp_test_pll_2.map.qmsg
..........\..\prev_cmp_test_pll_2.qmsg
..........\..\test_pll_2.cbx.xml
..........\..\test_pll_2.cmp.rdb
..........\..\test_pll_2.cmp_merge.kpt
..........\..\test_pll_2.db_info
..........\..\test_pll_2.eco.cdb
..........\..\test_pll_2.fnsim.qmsg
..........\..\test_pll_2.hier_info
..........\..\test_pll_2.hif
..........\..\test_pll_2.lpc.html
..........\..\test_pll_2.lpc.rdb
..........\..\test_pll_2.lpc.txt
..........\..\test_pll_2.map.bpm
..........\..\test_pll_2.map.cdb
..........\..\test_pll_2.map.ecobp
..........\..\test_pll_2.map.hdb
..........\..\test_pll_2.map.kpt
..........\..\test_pll_2.map.logdb
..........\..\test_pll_2.map.qmsg
..........\..\test_pll_2.map_bb.cdb
..........\..\test_pll_2.map_bb.hdb
..........\..\test_pll_2.map_bb.logdb
..........\..\test_pll_2.pre_map.cdb
..........\..\test_pll_2.pre_map.hdb
..........\..\test_pll_2.rtlv.hdb
..........\..\test_pll_2.rtlv_sg.cdb
..........\..\test_pll_2.rtlv_sg_swap.cdb
..........\..\test_pll_2.sgdiff.cdb
..........\..\test_pll_2.sgdiff.hdb
..........\..\test_pll_2.sim.hdb
..........\..\test_pll_2.sim.qmsg
..........\..\test_pll_2.sim.rdb
..........\..\test_pll_2.sld_design_entry.sci
..........\..\test_pll_2.sld_design_entry_dsc.sci
..........\..\test_pll_2.syn_hier_info
..........\..\test_pll_2.tis_db_list.ddb
..........\..\test_pll_2.tmw_info
..........\..\wed.wsf
..........\incremental_db\compiled_partitions\test_pll_2.root_partition.map.atm
..........\..............\...................\test_pll_2.root_partition.map.dpi
..........\..............\...................\test_pll_2.root_partition.map.hdbx
..........\..............\...................\test_pll_2.root_partition.map.kpt
..........\..............\...................\test_pll_2.root_partition.merge_hb.atm
..........\..............\README
..........\test_pll_2.bsf
..........\test_pll_2.done
..........\test_pll_2.flow.rpt
..........\test_pll_2.map.rpt
..........\test_pll_2.map.summary
..........\test_pll_2.qpf
..........\test_pll_2.qsf
..........\test_pll_2.qws
..........\test_pll_2.sim.rpt
..........\test_pll_2.vwf
..........\incremental_db\compiled_partitions
..........\db
..........\incremental_db
test_pll_2

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