Verilog serial communication program for FPGA control serial data to send, receive, including a serial debugging module and a control module, control module can be arbitrarily set themselves, serial module is fixed, all the procedures have been debugging, with a comment, very clear.

Serial_port_modul\db\logic_util_heursitic.dat
.................\..\prev_cmp_Serial_port_modul.qmsg
.................\..\Serial_port_modul.db_info
.................\DDR.qip
.................\greybox_tmp\cbx_args.txt
.................\incremental_db\compiled_partitions\Serial_port_modul.db_info
.................\..............\...................\Serial_port_modul.root_partition.cmp.dfp
.................\..............\...................\Serial_port_modul.root_partition.cmp.kpt
.................\..............\...................\Serial_port_modul.root_partition.cmp.logdb
.................\..............\...................\Serial_port_modul.root_partition.map.dpi
.................\..............\...................\Serial_port_modul.root_partition.map.kpt
.................\..............\README
.................\serial_port.bsf
.................\Serial_port.v
.................\Serial_port_modul.asm.rpt
.................\Serial_port_modul.bdf
.................\Serial_port_modul.cdf
.................\Serial_port_modul.done
.................\Serial_port_modul.dpf
.................\Serial_port_modul.fit.rpt
.................\Serial_port_modul.fit.summary
.................\Serial_port_modul.flow.rpt
.................\Serial_port_modul.map.rpt
.................\Serial_port_modul.map.summary
.................\Serial_port_modul.pin
.................\Serial_port_modul.pof
.................\Serial_port_modul.qpf
.................\Serial_port_modul.qsf
.................\Serial_port_modul.sof
.................\Serial_port_modul.tan.rpt
.................\Serial_port_modul.tan.summary
.................\TEST_CURE.bsf
.................\TEST_CURE.v
.................\incremental_db\compiled_partitions
.................\db
.................\greybox_tmp
.................\incremental_db
Serial_port_modul

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