Communication systems, HDB3 code simulation using VHDL language, and practical.

vhdl
....\db
....\..\logic_util_heursitic.dat
....\..\prev_cmp_test.qmsg
....\..\test.cbx.xml
....\..\test.cmp.rdb
....\..\test.cmp_merge.kpt
....\..\test.db_info
....\..\test.hier_info
....\..\test.hif
....\..\test.lpc.html
....\..\test.lpc.rdb
....\..\test.lpc.txt
....\..\test.map.bpm
....\..\test.map.cdb
....\..\test.map.hdb
....\..\test.map.kpt
....\..\test.map.logdb
....\..\test.map.qmsg
....\..\test.map_bb.cdb
....\..\test.map_bb.hdb
....\..\test.map_bb.logdb
....\..\test.pre_map.cdb
....\..\test.pre_map.hdb
....\..\test.rtlv.hdb
....\..\test.rtlv_sg.cdb
....\..\test.rtlv_sg_swap.cdb
....\..\test.sgdiff.cdb
....\..\test.sgdiff.hdb
....\..\test.sld_design_entry.sci
....\..\test.sld_design_entry_dsc.sci
....\..\test.smart_action.txt
....\..\test.syn_hier_info
....\..\test.tis_db_list.ddb
....\incremental_db
....\..............\compiled_partitions
....\..............\...................\test.db_info
....\..............\...................\test.root_partition.map.cdb
....\..............\...................\test.root_partition.map.dpi
....\..............\...................\test.root_partition.map.hdb
....\..............\...................\test.root_partition.map.kpt
....\..............\README
....\simulation
....\..........\modelsim
....\..........\........\modelsim.ini
....\..........\........\msim_transcript
....\..........\........\rtl_work
....\..........\........\........\test
....\..........\........\........\testbench
....\..........\........\........\.........\behavior.dat
....\..........\........\........\.........\behavior.dbs
....\..........\........\........\.........\behavior.prw
....\..........\........\........\.........\behavior.psm
....\..........\........\........\.........\_primary.dat
....\..........\........\........\.........\_primary.dbs
....\..........\........\........\....\behav.dat
....\..........\........\........\....\behav.dbs
....\..........\........\........\....\behav.prw
....\..........\........\........\....\behav.psm
....\..........\........\........\....\_primary.dat
....\..........\........\........\....\_primary.dbs
....\..........\........\........\_info
....\..........\........\........\_temp
....\..........\........\........\_vmake
....\..........\........\test_run_msim_rtl_vhdl.do
....\..........\........\test_run_msim_rtl_vhdl.do.bak
....\..........\........\test_run_msim_rtl_vhdl.do.bak1
....\..........\........\test_run_msim_rtl_vhdl.do.bak2
....\..........\........\vsim.wlf
....\test.done
....\test.flow.rpt
....\test.map.rpt
....\test.map.summary
....\test.qpf
....\test.qsf
....\test.vhd
....\test.vhd.bak
....\testbench.vhd
....\testbench.vhd.bak
....\test_nativelink_simulation.rpt
....\说明.txt

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