Adder input signal: the real part of the input number Ra, Rb, Rc, Rd, imaginary part Ia, Ib, Ic, Id data width is 19 each adder array can only send to one of the operands, including real numbers R (19bit), the imaginary part I (19bit) operational data a, c, b, d in order continuously fed, the adder column to be serial-parallel conversion. CP pulse. Output signal: Outputs the real part of Ra ' , Rb' , Rc ' , Rd' , the imaginary part of Ia ' , Ib' , Ic ' , Id' data width is 21.

h2\h2\0h2.mgf
..\..\1h2.mgf
..\..\3h2.mgf
..\..\bde.set
..\..\compilation.order
..\..\......e\contents.lib~h2
..\..\.......\h2.cmd
..\..\.......\h2.epr
..\..\.......\h2.erf
..\..\.......\sources.sth
..\..\.......\vsim.log
..\..\compile.cfg
..\..\Edfmap.ini
..\..\elaboration.log
..\..\h2.adf
..\..\h2.LIB
..\..\h2.wsp
..\..\log\console.log
..\..\projlib.cfg
..\..\src\alu2.vhd
..\..\...\alu2_test.vhd
..\..\...\transcript
..\..\...\untitled.asdb
..\..\...\untitled.awc
..\..\...\wave.asdb
..\..\synthesis.order
..\h2.aws
..\h2.wsw
..\library.cfg
..\h2\compile
..\..\log
..\..\src
..\h2
h2

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