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CycloneIII_EP3C40F780C8_8_UART

  • Category : VHDL-FPGA-Verilog
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  • Update : 2013-05-22
  • Size : 2.92mb
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  • Author :leiy****
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Introduction - If you have any usage issues, please Google them yourself
SOPC,CycloneIII,EP3C40F780C8,UART code
Packet file list
(Preview for download)


Exp8_UART\.sopc_builder\install.ptf
.........\.............\install2.ptf
.........\.............\preferences.xml
.........\CPU.ocp
.........\CPU.sdc
.........\CPU.v
.........\CPU_bht_ram.mif
.........\CPU_dc_tag_ram.mif
.........\CPU_ic_tag_ram.mif
.........\CPU_jtag_debug_module_sysclk.v
.........\CPU_jtag_debug_module_tck.v
.........\CPU_jtag_debug_module_wrapper.v
.........\CPU_mult_cell.v
.........\CPU_ociram_default_contents.mif
.........\CPU_oci_test_bench.v
.........\CPU_rf_ram_a.mif
.........\CPU_rf_ram_b.mif
.........\CPU_test_bench.v
.........\db\UART_Test.db_info
.........\..\UART_Test.eco.cdb
.........\..\UART_Test.sld_design_entry.sci
.........\incremental_db\compiled_partitions\UART_Test.root_partition.cmp.atm
.........\..............\...................\UART_Test.root_partition.cmp.cfm
.........\..............\...................\UART_Test.root_partition.cmp.dfp
.........\..............\...................\UART_Test.root_partition.cmp.hdbx
.........\..............\...................\UART_Test.root_partition.cmp.kpt
.........\..............\...................\UART_Test.root_partition.cmp.logdb
.........\..............\...................\UART_Test.root_partition.cmp.rcf
.........\..............\...................\UART_Test.root_partition.map.atm
.........\..............\...................\UART_Test.root_partition.map.dpi
.........\..............\...................\UART_Test.root_partition.map.hdbx
.........\..............\...................\UART_Test.root_partition.map.kpt
.........\..............\...................\UART_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
.........\..............\...................\UART_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.dpi
.........\..............\...................\UART_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.hdbx
.........\..............\...................\UART_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.kpt
.........\..............\...................\UART_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.logdb
.........\..............\README
.........\JTAG_UART.v
.........\mycpu.bsf
.........\mycpu.ptf
.........\mycpu.ptf.8.0
.........\mycpu.ptf.bak
.........\mycpu.ptf.pre_generation_ptf
.........\mycpu.qip
.........\mycpu.sopc
.........\mycpu.sopcinfo
.........\mycpu.v
.........\mycpu_generation_script
.........\mycpu_log.txt
.........\mycpu_setup_quartus.tcl
.........\.......im\dummy_file
.........\.........\JTAG_UART_input_mutex.dat
.........\.........\JTAG_UART_input_stream.dat
.........\.........\JTAG_UART_output_stream.dat
.........\.........\UART0_input_data_mutex.dat
.........\.........\UART0_input_data_stream.dat
.........\.........\UART0_log_module.txt
.........\software\UART_Test\.cdtbuild
.........\........\.........\.cdtproject
.........\........\.........\.project
.........\........\.........\.settings\org.eclipse.cdt.core.prefs
.........\........\.........\.........\org.eclipse.cdt.managedbuilder.core.prefs
.........\........\.........\application.stf
.........\........\.........\Debug\generated_app.sh
.........\........\.........\.....\makefile
.........\........\.........\.....\obj\main.d
.........\........\.........\.....\...\main.o
.........\........\.........\.....\subdir.mk
.........\........\.........\.....\UART_Test.elf
.........\........\.........\main.c
.........\........\.........\readme.txt
.........\........\........._syslib\.cdtbuild
.........\........\................\.cdtproject
.........\........\................\.project
.........\........\................\.settings\org.eclipse.cdt.core.prefs
.........\........\................\.........\org.eclipse.cdt.managedbuilder.core.prefs
.........\........\................\Debug\crt0.d
.........\........\................\.....\crt0.o
.........\........\................\.....\libUART_Test_syslib.a
.........\........\................\.....\makefile
.........\........\................\.....\obj\altera_avalon_jtag_uart_fd.d
.........\........\................\.....\...\altera_avalon_jtag_uart_fd.o
.........\........\................\.....\...\altera_avalon_jtag_
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