Controlador de display siete segmentos en verilog El archivo contiene selector decodificador multiplexor y archivo para simulacion Sevent segment dispay controler in verilog for basys nexys2 nexys3 fpga boards This file have a decoder, selector multiplexor and a test bench for simulation

Siete_Seg.v
Siete_Seg_Sim.v
Simu.v
Hab_Sim.v
Habilitador_Digito.v
PRINCIPAL.v

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