VHDL any odd division, the simulation is correct, common procedures.

ji_div\iseconfig\ji_div.projectmgr
......\.........\ji_div.xreport
......\ji_div.cmd_log
......\ji_div.fdo
......\ji_div.gise
......\ji_div.lso
......\ji_div.ngc
......\ji_div.ngr
......\ji_div.prj
......\ji_div.stx
......\ji_div.syr
......\ji_div.udo
......\ji_div.vhd
......\ji_div.xise
......\ji_div.xst
......\ji_div_envsettings.html
......\ji_div_summary.html
......\ji_div_vhdl.prj
......\ji_div_wave.fdo
......\ji_div_xst.xrpt
......\modelsim.ini
......\transcript
......\vsim.wlf
......\wave.do
......\webtalk_pn.xml
......\.ork\@_opt\vopt2kbik3
......\....\.....\vopt641fk3
......\....\.....\vopt9knck3
......\....\.....\voptdk7845
......\....\.....\voptk3hz45
......\....\.....\voptk4q2k3
......\....\.....\voptqwxw18
......\....\.....\voptrkczj3
......\....\.....\voptv42vj3
......\....\.....\voptvcjs18
......\....\.....\_deps
......\....\ji_div\behavioral.dat
......\....\......\behavioral.dbs
......\....\......\_primary.dat
......\....\......\_primary.dbs
......\....\_info
......\....\_vmake
......\xst\work\hdllib.ref
......\...\....\hdpdeps.ref
......\...\....\sub00\vhpl00.vho
......\...\....\.....\vhpl01.vho
......\_xmsgs\pn_parser.xmsgs
......\......\xst.xmsgs
......\xst\dump.xst\ji_div.prj\ngx\notopt
......\...\........\..........\...\opt
......\...\........\..........\ngx
......\...\........\ji_div.prj
......\...\work\sub00
......\work\@_opt
......\....\ji_div
......\....\_temp
......\xst\dump.xst
......\...\projnav.tmp
......\...\work
......\ipcore_dir
......\iseconfig
......\work
......\xst
......\_xmsgs
ji_div

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