high-level data link control procedure VERILOG CODE

TxStateMachine.v
TxStateMachine_tb.v
TxTOPModule.v
TxTOPModule_tb.v
ADCBlock.v
ADCBlock_tb.v
ADCMUX.v
ADCMUX_tb.v
ChCounter.v
ChCounter_tb.v
DataLenCount.v
DataLenCount_tb.v
DataLenCounter.v
DataMux.v
DataMux_tb.v
DeFramer.v
DeFramer_tb.v
DMux.v
DMux_tb.v
FIFO32x8.v
FIFO32x8_tb.v
FramerBlock.v
FramerBlock_tb.v
RxCRC.v
RxCRC_tb.v
RxShiftRegister.v
RxShiftRegister_tb.v
RxSMC.v
RxSMC_tb.v
RxTOP.v
RxTOP_tb.v
SOPDet.v
SOPDet_tb.v
TxCRC.v
TxCRC_tb.v
TxShiftRegister.v
TxShiftRegister_tb.v
sridevi.docx
synapsis1_sridevi.docx

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