This my curriculum design. Micro-program control CPU can read instructions from the RAM and executed. Contains the MBR, MAR, IR, BR, ALU, PC and other functional components, can be realized subtraction multiplication, logical shift left and right, and logic NOR, on this basis can also be extended. I hope you can help.

cpu\ALU.bsf
...\alu.vhd
...\alu.vhd.bak
...\alu.vwf
...\BR.bsf
...\br.vhd
...\br.vhd.bak
...\br.vwf
...\cpu.bdf
...\cpu.mif
...\cpu.vwf
...\cpu1.vwf
...\cpu2.vwf
...\cpu3.vwf
...\cpu4.vwf
...\cu.asm.rpt
...\cu.bsf
...\cu.done
...\cu.fit.rpt
...\cu.fit.smsg
...\cu.fit.summary
...\cu.flow.rpt
...\cu.map.rpt
...\cu.map.summary
...\cu.pin
...\cu.pof
...\cu.qpf
...\cu.qsf
...\cu.qws
...\cu.sim.rpt
...\cu.sof
...\cu.tan.rpt
...\cu.tan.summary
...\cu.vhd
...\cu.vhd.bak
...\db\altsyncram_c5q1.tdf
...\..\cu.analyze_file.qmsg
...\..\cu.asm.qmsg
...\..\cu.asm_labs.ddb
...\..\cu.atom.rvd
...\..\cu.cbx.xml
...\..\cu.cmp.bpm
...\..\cu.cmp.cdb
...\..\cu.cmp.ecobp
...\..\cu.cmp.hdb
...\..\cu.cmp.logdb
...\..\cu.cmp.rdb
...\..\cu.cmp.tdb
...\..\cu.cmp0.ddb
...\..\cu.db_info
...\..\cu.eco.cdb
...\..\cu.eds_overflow
...\..\cu.fit.qmsg
...\..\cu.fnsim.cdb
...\..\cu.fnsim.hdb
...\..\cu.fnsim.qmsg
...\..\cu.hier_info
...\..\cu.hif
...\..\cu.map.bpm
...\..\cu.map.cdb
...\..\cu.map.ecobp
...\..\cu.map.hdb
...\..\cu.map.logdb
...\..\cu.map.qmsg
...\..\cu.map_bb.cdb
...\..\cu.map_bb.hdb
...\..\cu.map_bb.hdbx
...\..\cu.map_bb.logdb
...\..\cu.pre_map.cdb
...\..\cu.pre_map.hdb
...\..\cu.psp
...\..\cu.root_partition.cmp.atm
...\..\cu.root_partition.cmp.cfm
...\..\cu.root_partition.cmp.dfp
...\..\cu.root_partition.cmp.hdbx
...\..\cu.root_partition.cmp.logdb
...\..\cu.root_partition.cmp.rcf
...\..\cu.root_partition.map.atm
...\..\cu.root_partition.map.hdbx
...\..\cu.root_partition.map.info
...\..\cu.rpp.qmsg
...\..\cu.rtlv.hdb
...\..\cu.rtlv_sg.cdb
...\..\cu.rtlv_sg_swap.cdb
...\..\cu.sgdiff.cdb
...\..\cu.sgdiff.hdb
...\..\cu.signalprobe.cdb
...\..\cu.sim.cvwf
...\..\cu.sim.hdb
...\..\cu.sim.qmsg
...\..\cu.sim.rdb
...\..\cu.simfam
...\..\cu.sld_design_entry.sci
...\..\cu.sld_design_entry_dsc.sci
...\..\cu.syn_hier_info
...\..\cu.tan.qmsg
...\..\cu.tis_db_list.ddb
...\..\cu.tmw_info
...\..\mult_9v01.tdf
...\..\mux_aqc.tdf

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