RISC CPU properly verified by simulation (using the previously sure to see the readme file and structure chart!) This CPU is the last chapter Xia Wen verilog Digital System Design Guide routine. 2 study sure to thoroughly understand block diagram of the principle, and the flow of data! ! ! Keep in mind one instruction cycle in the transmission of the main state machine the 16bit = 3bit instruction+13bit address. 4 understand the data bus and address bus. Between data and addresses. Carefully debugging, because there are many small errors in the book. The program compiled through quartusii by the addition after modelsim simulation.

RISC-CPU\CPU\accum.v
........\...\accum.v.bak
........\...\adr.v
........\...\alu.v
........\...\alu.v.bak
........\...\clk_gen.v
........\...\clk_gen.v.bak
........\...\counter.v
........\...\CPU.asm.rpt
........\...\CPU.done
........\...\CPU.fit.rpt
........\...\CPU.fit.smsg
........\...\CPU.fit.summary
........\...\CPU.flow.rpt
........\...\CPU.map.rpt
........\...\CPU.map.summary
........\...\CPU.pin
........\...\CPU.qpf
........\...\CPU.qsf
........\...\CPU.sof
........\...\CPU.sta.rpt
........\...\CPU.sta.summary
........\...\datactl.v
........\...\datactl.v.bak
........\...\.b\CPU.amm.cdb
........\...\..\CPU.asm.qmsg
........\...\..\CPU.asm.rdb
........\...\..\CPU.asm_labs.ddb
........\...\..\CPU.cbx.xml
........\...\..\CPU.cmp.bpm
........\...\..\CPU.cmp.cdb
........\...\..\CPU.cmp.hdb
........\...\..\CPU.cmp.kpt
........\...\..\CPU.cmp.logdb
........\...\..\CPU.cmp.rdb
........\...\..\CPU.cmp_merge.kpt
........\...\..\CPU.db_info
........\...\..\CPU.fit.qmsg
........\...\..\CPU.hier_info
........\...\..\CPU.hif
........\...\..\CPU.idb.cdb
........\...\..\CPU.lpc.html
........\...\..\CPU.lpc.rdb
........\...\..\CPU.lpc.txt
........\...\..\CPU.map.bpm
........\...\..\CPU.map.cdb
........\...\..\CPU.map.hdb
........\...\..\CPU.map.kpt
........\...\..\CPU.map.logdb
........\...\..\CPU.map.qmsg
........\...\..\CPU.map_bb.cdb
........\...\..\CPU.map_bb.hdb
........\...\..\CPU.map_bb.logdb
........\...\..\CPU.pre_map.cdb
........\...\..\CPU.pre_map.hdb
........\...\..\CPU.rtlv.hdb
........\...\..\CPU.rtlv_sg.cdb
........\...\..\CPU.rtlv_sg_swap.cdb
........\...\..\CPU.sgdiff.cdb
........\...\..\CPU.sgdiff.hdb
........\...\..\CPU.sld_design_entry.sci
........\...\..\CPU.sld_design_entry_dsc.sci
........\...\..\CPU.smart_action.txt
........\...\..\CPU.smp_dump.txt
........\...\..\CPU.sta.qmsg
........\...\..\CPU.sta.rdb
........\...\..\CPU.sta_cmp.7_slow_1200mv_85c.tdb
........\...\..\CPU.stingray_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
........\...\..\CPU.stingray_io_sim_cache.45um_ii_1200mv_0c_slow.hsd
........\...\..\CPU.stingray_io_sim_cache.45um_ii_1200mv_85c_slow.hsd
........\...\..\CPU.syn_hier_info
........\...\..\CPU.tiscmp.fastest_slow_1200mv_0c.ddb
........\...\..\CPU.tiscmp.fastest_slow_1200mv_85c.ddb
........\...\..\CPU.tiscmp.fast_1200mv_0c.ddb
........\...\..\CPU.tiscmp.slow_1200mv_0c.ddb
........\...\..\CPU.tiscmp.slow_1200mv_85c.ddb
........\...\..\CPU.tis_db_list.ddb
........\...\..\logic_util_heursitic.dat
........\...\..\prev_cmp_CPU.qmsg
........\...\db
........\...\incremental_db\compiled_partitions\CPU.db_info
........\...\..............\...................\CPU.root_partition.cmp.cdb
........\...\..............\...................\CPU.root_partition.cmp.dfp
........\...\..............\...................\CPU.root_partition.cmp.hdb
........\...\..............\...................\CPU.root_partition.cmp.kpt
........\...\..............\...................\CPU.root_partition.cmp.logdb
........\...\..............\...................\CPU.root_partition.cmp.rcfdb
........\...\..............\...................\CPU.root_partition.map.cdb
........\...\..............\...................\CPU.root_partition.map.dpi
........\...\..............\...................\CPU.root_partition.map.hbdb.cdb
........\...\..............\...................\CPU.root_partition.map.hbdb.hb_info
........\...\..............\...................\CPU.root_partition.map.hbdb.hdb
........\...\..............\...................\CPU.root_partition.map.hbdb.sig
........\...\..............\...................\CPU.root_partition.map.hdb
........\...\..............\...................\CPU.root_partition.map.kpt
........\...\..............\compiled_partitions
........\...\..............\README
........\...\incremental_db
........\...\machine.v
........\...\machine.v.bak

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