This a 3 counter diagram of the experimental procedures, for your reference

3
.\3weijishiqi
.\...........\3weijishiqi.flow.rpt
.\...........\3weijishiqi.map.rpt
.\...........\3weijishiqi.map.summary
.\...........\3weijishiqi.qpf
.\...........\3weijishiqi.qsf
.\...........\3weijishiqi.qws
.\...........\3weijishiqi.vhd
.\...........\db
.\...........\..\3weijishiqi.cbx.xml
.\...........\..\3weijishiqi.cmp.rdb
.\...........\..\3weijishiqi.db_info
.\...........\..\3weijishiqi.eco.cdb
.\...........\..\3weijishiqi.map.hdb
.\...........\..\3weijishiqi.map.qmsg
.\...........\..\3weijishiqi.sld_design_entry.sci
.\3weijishuqi
.\...........\clock.asm.rpt
.\...........\clock.cdf
.\...........\clock.done
.\...........\clock.dpf
.\...........\clock.fit.rpt
.\...........\clock.fit.smsg
.\...........\clock.fit.summary
.\...........\clock.flow.rpt
.\...........\clock.map.rpt
.\...........\clock.map.summary
.\...........\clock.pin
.\...........\clock.pof
.\...........\clock.qpf
.\...........\clock.qsf
.\...........\clock.qws
.\...........\clock.sim.rpt
.\...........\clock.sof
.\...........\clock.tan.rpt
.\...........\clock.tan.summary
.\...........\clock.vhd
.\...........\clock.vwf
.\...........\clock_assignment_defaults.qdf
.\...........\db
.\...........\..\clock.asm.qmsg
.\...........\..\clock.cbx.xml
.\...........\..\clock.cmp.cdb
.\...........\..\clock.cmp.hdb
.\...........\..\clock.cmp.kpt
.\...........\..\clock.cmp.logdb
.\...........\..\clock.cmp.rdb
.\...........\..\clock.cmp.tdb
.\...........\..\clock.cmp0.ddb
.\...........\..\clock.db_info
.\...........\..\clock.dbp
.\...........\..\clock.eco.cdb
.\...........\..\clock.fit.qmsg
.\...........\..\clock.hier_info
.\...........\..\clock.hif
.\...........\..\clock.map.cdb
.\...........\..\clock.map.hdb
.\...........\..\clock.map.logdb
.\...........\..\clock.map.qmsg
.\...........\..\clock.pre_map.cdb
.\...........\..\clock.pre_map.hdb
.\...........\..\clock.psp
.\...........\..\clock.pss
.\...........\..\clock.rtlv.hdb
.\...........\..\clock.rtlv_sg.cdb
.\...........\..\clock.rtlv_sg_swap.cdb
.\...........\..\clock.sgdiff.cdb
.\...........\..\clock.sgdiff.hdb
.\...........\..\clock.signalprobe.cdb
.\...........\..\clock.sld_design_entry.sci
.\...........\..\clock.sld_design_entry_dsc.sci
.\...........\..\clock.syn_hier_info
.\...........\..\clock.tan.qmsg
.\...........\..\wed.zsf

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