The EP1C6 achieve VGA display, has been compiled, please use

S6_VGA
......\.sopc_builder
......\.............\filters.xml
......\Doc
......\...\程序说明.txt
......\MAC_rx.bsf
......\MAC_top.bsf
......\Proj
......\....\.sopc_builder
......\....\.............\filters.xml
......\....\.............\preferences.xml
......\....\ColorBar.asm.rpt
......\....\ColorBar.cdf
......\....\ColorBar.done
......\....\ColorBar.eda.rpt
......\....\ColorBar.fit.eqn
......\....\ColorBar.fit.rpt
......\....\ColorBar.fit.summary
......\....\ColorBar.flow.rpt
......\....\ColorBar.map.eqn
......\....\ColorBar.map.rpt
......\....\ColorBar.map.summary
......\....\ColorBar.pin
......\....\ColorBar.pof
......\....\ColorBar.qpf
......\....\ColorBar.qsf
......\....\ColorBar.sof
......\....\ColorBar.tan.rpt
......\....\ColorBar.tan.summary
......\....\ColorBar_assignment_defaults.qdf
......\....\VGA_PLL.bsf
......\....\VGA_PLL.v
......\....\VGA_PLL_bb.v
......\....\altpllpll_0.v
......\....\cmp_state.ini
......\....\db
......\....\..\ColorBar.db_info
......\....\..\ColorBar.eco.cdb
......\....\..\ColorBar.sld_design_entry.sci
......\....\..\ColorBar_cmp.qrpt
......\....\..\altsyncram_1f92.tdf
......\....\..\altsyncram_fl82.tdf
......\....\..\altsyncram_hl82.tdf
......\....\..\altsyncram_qso3.tdf
......\....\..\cmpr_j4c.tdf
......\....\..\cmpr_l4c.tdf
......\....\..\cmpr_n4c.tdf
......\....\..\cntr_a4i.tdf
......\....\..\cntr_cti.tdf
......\....\..\cntr_f29.tdf
......\....\..\cntr_gq7.tdf
......\....\..\cntr_ln7.tdf
......\....\..\cntr_no8.tdf
......\....\..\cntr_p2i.tdf
......\....\..\cntr_qt7.tdf
......\....\..\cntr_rt7.tdf
......\....\..\cntr_umi.tdf
......\....\..\cntr_vt9.tdf
......\....\..\decode_9ie.tdf
......\....\..\decode_9jf.tdf
......\....\..\mux_ngc.tdf
......\....\..\prev_cmp_ColorBar.map.qmsg
......\....\..\prev_cmp_ColorBar.qmsg
......\....\simulation
......\....\..........\modelsim
......\....\..........\........\ColorBar.vo
......\....\..........\........\ColorBar_modelsim.xrf
......\....\..........\........\ColorBar_v.sdo
......\....\..........\........\cyclone_atoms.v
......\....\..........\........\vga_test.cr.mti
......\....\..........\........\vga_test.mpf
......\....\..........\........\vga_test.v
......\....\..........\........\vga_vl.v
......\....\..........\........\vsim.wlf
......\....\..........\........\wave.do
......\....\..........\........\work
......\....\..........\........\....\@c@y@c@l@o@n@e_@p@r@i@m_@d@f@f@e
......\....\..........\........\....\................................\_primary.dat
......\....\..........\........\....\................................\_primary.vhd
......\....\..........\........\....\................................\verilog.asm
......\....\..........\........\....\@color@bar
......\....\..........\........\....\..........\_primary.dat
......\....\..........\........\....\..........\_primary.vhd
......\....\..........\........\....\..........\verilog.asm
......\....\..........\........\....\_info
......\....\..........\........\....\cyclone_and1
......\....\..........\........\....\............\_primary.dat
......\....\..........\........\....\............\_primary.vhd
......\....\..........\........\....\............\verilog.asm
......\....\..........\........\....\cyclone_and16
......\....\..........\........\....\.............\_primary.dat
......\....\..........\........\....\.............\_primary.vhd
......\....\..........\........\....\.............\verilog.asm
......\....\..........\........\....\cyclone_asmiblock
......\....\..........\........\....\.................\_primary.dat
......\....\..........\........\....\.................\_primary.vhd
......\....\..........\........\....\.................\verilog.asm
......\....\..........\........\....\cyclone_asynch_io
......\....\..........\........\....\.................\_primary.dat
......\....\..........\........\....\.................\_primary.vhd

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