VerilogHDL write the analog-to-digital conversion chip MCP3301 timing, its ModelSim simulation file

work\@m@c@p3301\_primary.dat
....\..........\_primary.vhd
....\.........._tb\_primary.dat
....\.............\_primary.vhd
....\_info
MCP3301.v
MCP3301.v.bak
MCP3301_tb.v
MCP3301_tb.v.bak
MCP3301ADC.cr.mti
MCP3301ADC.mpf
vsim.wlf
wlft9c0vx2
wlfti8m4aq
.ork\@m@c@p3301
....\@m@c@p3301_tb
....\_temp
work

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