VHDL language to realize the simulation of the four elevators, were rising, declined requests

dianti\db\add_sub_ojh.tdf
......\..\dianti1.analyze_file.qmsg
......\..\dianti1.asm.qmsg
......\..\dianti1.cbx.xml
......\..\dianti1.cmp.cdb
......\..\dianti1.cmp.hdb
......\..\dianti1.cmp.logdb
......\..\dianti1.cmp.rdb
......\..\dianti1.cmp.tdb
......\..\dianti1.cmp0.ddb
......\..\dianti1.db_info
......\..\dianti1.eco.cdb
......\..\dianti1.fit.qmsg
......\..\dianti1.hier_info
......\..\dianti1.hif
......\..\dianti1.lpc.html
......\..\dianti1.lpc.rdb
......\..\dianti1.lpc.txt
......\..\dianti1.map.cdb
......\..\dianti1.map.hdb
......\..\dianti1.map.logdb
......\..\dianti1.map.qmsg
......\..\dianti1.pre_map.cdb
......\..\dianti1.pre_map.hdb
......\..\dianti1.rtlv.hdb
......\..\dianti1.rtlv_sg.cdb
......\..\dianti1.rtlv_sg_swap.cdb
......\..\dianti1.sgdiff.cdb
......\..\dianti1.sgdiff.hdb
......\..\dianti1.sld_design_entry.sci
......\..\dianti1.sld_design_entry_dsc.sci
......\..\dianti1.syn_hier_info
......\..\dianti1.tan.qmsg
......\..\dianti1.tis_db_list.ddb
......\..\prev_cmp_dianti1.asm.qmsg
......\..\prev_cmp_dianti1.fit.qmsg
......\..\prev_cmp_dianti1.map.qmsg
......\..\prev_cmp_dianti1.qmsg
......\..\prev_cmp_dianti1.tan.qmsg
......\dianti1.asm.rpt
......\dianti1.done
......\dianti1.fit.rpt
......\dianti1.fit.summary
......\dianti1.flow.rpt
......\dianti1.map.rpt
......\dianti1.map.summary
......\dianti1.pin
......\dianti1.pof
......\dianti1.qpf
......\dianti1.qsf
......\dianti1.qws
......\dianti1.sof
......\dianti1.tan.rpt
......\dianti1.tan.summary
......\did.bdf
......\fcontrol.bsf
......\fcontrol.inc
......\fcontrol.vhd
......\fcontrol.vhd.bak
......\incremental_db\compiled_partitions\dianti1.root_partition.map.kpt
......\..............\README
......\key.bsf
......\key.inc
......\key.vhd
......\key.vhd.bak
......\incremental_db\compiled_partitions
......\db
......\incremental_db
dianti

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