vga interface with xilinx spartran 3e

testvga\clockmodule.bld
.......\clockmodule.cmd_log
.......\clockmodule.lso
.......\clockmodule.ncd
.......\clockmodule.ngc
.......\clockmodule.ngd
.......\clockmodule.ngr
.......\clockmodule.pad
.......\clockmodule.par
.......\clockmodule.pcf
.......\clockmodule.prj
.......\clockmodule.ptwx
.......\clockmodule.stx
.......\clockmodule.syr
.......\clockmodule.twr
.......\clockmodule.twx
.......\clockmodule.unroutes
.......\clockmodule.xpi
.......\clockmodule.xst
.......\clockmodule_guide.ncd
.......\clockmodule_map.map
.......\clockmodule_map.mrp
.......\clockmodule_map.ncd
.......\clockmodule_map.ngm
.......\clockmodule_map.xrpt
.......\clockmodule_ngdbuild.xrpt
.......\clockmodule_pad.csv
.......\clockmodule_pad.txt
.......\clockmodule_par.xrpt
.......\clockmodule_summary.xml
.......\clockmodule_usage.xml
.......\clockmodule_vhdl.prj
.......\clockmodule_xst.xrpt
.......\connection.ucf
.......\iseconfig\main.xreport
.......\.........\testvga.projectmgr
.......\main.vhd
.......\main_summary.html
.......\testvga.gise
.......\testvga.xise
.......\webtalk_pn.xml
.......\xlnx_auto_0_xdb\cst.xbcd
.......\.st\work\hdllib.ref
.......\...\....\hdpdeps.ref
.......\...\....\sub00\vhpl00.vho
.......\...\....\.....\vhpl01.vho
.......\_ngo\netlist.lst
.......\.xmsgs\map.xmsgs
.......\......\ngdbuild.xmsgs
.......\......\par.xmsgs
.......\......\pn_parser.xmsgs
.......\......\trce.xmsgs
.......\......\xst.xmsgs
.......\xst\dump.xst\clockmodule.prj\ngx\notopt
.......\...\........\...............\...\opt
.......\...\........\...............\ngx
.......\...\........\clockmodule.prj
.......\...\work\sub00
.......\...\dump.xst
.......\...\projnav.tmp
.......\...\work
.......\ipcore_dir
.......\iseconfig
.......\xlnx_auto_0_xdb
.......\xst
.......\_ngo
.......\_xmsgs
testvga

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