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dongmiaobiao55

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 766kb
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  • Author :xiao****
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Clock verilog language to describe and FPGA-based digital tube display and buttons to adjust the time.
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shizhong.tan.summary
shizhong.v
shizhong.v.bak
db\shizhong.cmp.cdb
..\shizhong.db_info
..\shizhong.tis_db_list.ddb
..\shizhong.fit.qmsg
..\shizhong.cmp2.ddb
..\prev_cmp_shizhong.map.qmsg
..\shizhong.asm.qmsg
..\logic_util_heursitic.dat
..\shizhong.tan.qmsg
..\shizhong.cbx.xml
..\shizhong.hif
..\shizhong.map.qmsg
..\shizhong.cmp.logdb
..\shizhong.eda.qmsg
..\shizhong.rtlv_sg_swap.cdb
..\shizhong.cmp.ecobp
..\prev_cmp_shizhong.fit.qmsg
..\prev_cmp_shizhong.qmsg
..\shizhong.rpp.qmsg
..\shizhong.hier_info
..\shizhong.sgate_sm.rvd
..\shizhong.smart_action.txt
..\prev_cmp_shizhong.asm.qmsg
..\prev_cmp_shizhong.tan.qmsg
..\shizhong.lpc.txt
..\prev_cmp_shizhong.eda.qmsg
..\shizhong.rtlv_sg.cdb
..\shizhong.syn_hier_info
..\shizhong.lpc.html
..\shizhong.map_bb.logdb
..\shizhong.eco.cdb
..\shizhong.sgate.rvd
..\shizhong.map.ecobp
..\shizhong.map.kpt
..\shizhong.cmp_merge.kpt
..\shizhong.tmw_info
..\shizhong.lpc.rdb
..\shizhong.pre_map.hdb
..\shizhong.pre_map.cdb
..\shizhong.sgdiff.cdb
..\shizhong.sgdiff.hdb
..\shizhong.rtlv.hdb
..\shizhong.sld_design_entry_dsc.sci
..\shizhong.cmp.bpm
..\shizhong.map_bb.cdb
..\shizhong.map.cdb
..\shizhong.map_bb.hdb
..\shizhong.cmp.kpt
..\shizhong.map.hdb
..\shizhong.map.logdb
..\shizhong.map.bpm
..\shizhong.cmp.tdb
..\shizhong.cmp.rdb
..\shizhong.asm.rdb
..\shizhong.asm_labs.ddb
..\shizhong.cmp.hdb
..\shizhong.cmp0.ddb
..\shizhong.sld_design_entry.sci
incremental_db\compiled_partitions\shizhong.root_partition.map.kpt
..............\...................\shizhong.root_partition.cmp.logdb
..............\...................\shizhong.root_partition.cmp.kpt
..............\...................\shizhong.root_partition.map.dpi
..............\...................\shizhong.root_partition.map.cdb
..............\...................\shizhong.root_partition.map.hdb
..............\...................\shizhong.root_partition.cmp.re.rcfdb
..............\...................\shizhong.root_partition.cmp.rcfdb
..............\...................\shizhong.root_partition.cmp.cdb
..............\...................\shizhong.root_partition.cmp.hdb
..............\...................\shizhong.root_partition.cmp.dfp
..............\README
simulation\modelsim\shizhong_modelsim.xrf
..........\........\shizhong.vo
..........\........\shizhong_v.sdo
..........\........\shizhong.sft
shizhong.asm.rpt
shizhong.done
shizhong.dpf
shizhong.eda.rpt
shizhong.fit.rpt
shizhong.fit.smsg
shizhong.fit.summary
shizhong.flow.rpt
shizhong.map.rpt
shizhong.map.summary
shizhong.pin
shizhong.pof
shizhong.qpf
shizhong.qsf
shizhong.qws
shizhong.sof
shizhong.tan.rpt
incremental_db\compiled_partitions
simulation\modelsim
db
incremental_db
simulation
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