With the FIFO the ov7670 FPGA applications used by the test, looking to adopt.

NIOSII_TFT_COMS\altpll0.bsf
...............\altpll0.ppf
...............\altpll0.qip
...............\altpll0.v
...............\altpll0_bb.v
...............\altpll0_wave0.jpg
...............\altpll0_waveforms.html
...............\CCD_Capture.v
...............\CCD_Capture.v.bak
...............\cmos_top.bsf
...............\cmos_top.v
...............\cmos_top.v.bak
...............\cpu.ocp
...............\cpu.sdc
...............\cpu.v
...............\cpu_ic_tag_ram.mif
...............\cpu_jtag_debug_module_sysclk.v
...............\cpu_jtag_debug_module_tck.v
...............\cpu_jtag_debug_module_wrapper.v
...............\cpu_mult_cell.v
...............\cpu_ociram_default_contents.mif
...............\cpu_oci_test_bench.v
...............\cpu_rf_ram_a.mif
...............\cpu_rf_ram_b.mif
...............\cpu_test_bench.v
...............\EXP_SDRAM.asm.rpt
...............\EXP_SDRAM.bdf
...............\EXP_SDRAM.cdf
...............\EXP_SDRAM.done
...............\EXP_SDRAM.dpf
...............\EXP_SDRAM.fit.rpt
...............\EXP_SDRAM.fit.smsg
...............\EXP_SDRAM.fit.summary
...............\EXP_SDRAM.flow.rpt
...............\EXP_SDRAM.jdi
...............\EXP_SDRAM.map.rpt
...............\EXP_SDRAM.map.smsg
...............\EXP_SDRAM.map.summary
...............\EXP_SDRAM.pin
...............\EXP_SDRAM.pof
...............\EXP_SDRAM.qpf
...............\EXP_SDRAM.qsf
...............\EXP_SDRAM.qws
...............\EXP_SDRAM.sof
...............\EXP_SDRAM.tan.rpt
...............\EXP_SDRAM.tan.summary
...............\EXP_SDRAM_assignment_defaults.qdf
...............\EXP_SDRAM_time_limited.cdf
...............\fpga src\altpll0.v
...............\........\altpll0_bb.v
...............\........\CCD_Capture.v
...............\........\cmos_top.v
...............\........\cpu.v
...............\........\cpu_jtag_debug_module_sysclk.v
...............\........\cpu_jtag_debug_module_tck.v
...............\........\cpu_jtag_debug_module_wrapper.v
...............\........\cpu_mult_cell.v
...............\........\cpu_oci_test_bench.v
...............\........\cpu_test_bench.v
...............\........\jtag_uart.v
...............\........\LCD_CS.v
...............\........\LCD_DATAPORT.v
...............\........\LCD_DATAPORT16.v
...............\........\LCD_DataPortH.v
...............\........\LCD_DataPortL.v
...............\........\LCD_RD.v
...............\........\LCD_RESET.v
...............\........\LCD_REST.v
...............\........\LCD_RS.v
...............\........\lcd_switch.v
...............\........\LCD_WR.v
...............\........\MCU.v
...............\........\MCU_inst.v
...............\........\onchip_memory2_0.v
...............\........\pio_led.v
...............\........\Reset_Delay.v
...............\........\SCCB_SIO_C.v
...............\........\SCCB_SIO_D.v
...............\........\SCL.v
...............\........\SDA.v
...............\........\sdram.v
...............\........\sdram_test_component.v
...............\........\write_tft.v
...............\jtag_uart.v
...............\LCD_CS.v
...............\LCD_DATAPORT.v
...............\LCD_DATAPORT16.v
...............\LCD_DataPortH.v
...............\LCD_DataPortL.v
...............\LCD_RD.v
...............\LCD_RESET.v
...............\LCD_REST.v
...............\LCD_RS.v
...............\lcd_switch.bsf
...............\lcd_switch.v
...............\lcd_switch.v.bak
...............\LCD_WR.v
...............\MCU.bsf
...............\MCU.html
...............\MCU.ptf

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