FPGA EP3C16 chip Buzzer-based program, use the Verilog language, have been tested, the pin has been assigned

Buzzer\db\div_f.amm.cdb
......\..\div_f.asm.qmsg
......\..\div_f.asm.rdb
......\..\div_f.asm_labs.ddb
......\..\div_f.cbx.xml
......\..\div_f.cmp.bpm
......\..\div_f.cmp.cdb
......\..\div_f.cmp.hdb
......\..\div_f.cmp.kpt
......\..\div_f.cmp.logdb
......\..\div_f.cmp.rdb
......\..\div_f.cmp_merge.kpt
......\..\div_f.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
......\..\div_f.cuda_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
......\..\div_f.db_info
......\..\div_f.fit.qmsg
......\..\div_f.hier_info
......\..\div_f.hif
......\..\div_f.idb.cdb
......\..\div_f.lpc.html
......\..\div_f.lpc.rdb
......\..\div_f.lpc.txt
......\..\div_f.map.bpm
......\..\div_f.map.cdb
......\..\div_f.map.hdb
......\..\div_f.map.kpt
......\..\div_f.map.logdb
......\..\div_f.map.qmsg
......\..\div_f.map_bb.cdb
......\..\div_f.map_bb.hdb
......\..\div_f.map_bb.logdb
......\..\div_f.pre_map.cdb
......\..\div_f.pre_map.hdb
......\..\div_f.rtlv.hdb
......\..\div_f.rtlv_sg.cdb
......\..\div_f.rtlv_sg_swap.cdb
......\..\div_f.sgdiff.cdb
......\..\div_f.sgdiff.hdb
......\..\div_f.sld_design_entry.sci
......\..\div_f.sld_design_entry_dsc.sci
......\..\div_f.smart_action.txt
......\..\div_f.sta.qmsg
......\..\div_f.sta.rdb
......\..\div_f.sta_cmp.8_slow_1200mv_85c.tdb
......\..\div_f.syn_hier_info
......\..\div_f.tiscmp.fast_1200mv_0c.ddb
......\..\div_f.tiscmp.slow_1200mv_0c.ddb
......\..\div_f.tiscmp.slow_1200mv_85c.ddb
......\..\div_f.tis_db_list.ddb
......\..\div_f.tmw_info
......\..\logic_util_heursitic.dat
......\..\prev_cmp_div_f.asm.qmsg
......\..\prev_cmp_div_f.fit.qmsg
......\..\prev_cmp_div_f.map.qmsg
......\..\prev_cmp_div_f.qmsg
......\..\prev_cmp_div_f.tan.qmsg
......\div_f.asm.rpt
......\div_f.cdf
......\div_f.done
......\div_f.fit.rpt
......\div_f.fit.smsg
......\div_f.fit.summary
......\div_f.flow.rpt
......\div_f.map.rpt
......\div_f.map.summary
......\div_f.pin
......\div_f.pof
......\div_f.qpf
......\div_f.qsf
......\div_f.qws
......\div_f.sof
......\div_f.sta.rpt
......\div_f.sta.summary
......\div_f.tan.rpt
......\div_f.tan.summary
......\div_f.vhd
......\div_f.vhd.bak
......\div_f_assignment_defaults.qdf
......\incremental_db\compiled_partitions\div_f.db_info
......\..............\...................\div_f.root_partition.cmp.atm
......\..............\...................\div_f.root_partition.cmp.cdb
......\..............\...................\div_f.root_partition.cmp.dfp
......\..............\...................\div_f.root_partition.cmp.hdb
......\..............\...................\div_f.root_partition.cmp.hdbx
......\..............\...................\div_f.root_partition.cmp.kpt
......\..............\...................\div_f.root_partition.cmp.logdb
......\..............\...................\div_f.root_partition.cmp.rcf
......\..............\...................\div_f.root_partition.cmp.rcfdb
......\..............\...................\div_f.root_partition.map.atm
......\..............\...................\div_f.root_partition.map.cdb
......\..............\...................\div_f.root_partition.map.dpi
......\..............\...................\div_f.root_partition.map.hbdb.cdb
......\..............\...................\div_f.root_partition.map.hbdb.hb_info
......\..............\...................\div_f.root_partition.map.hbdb.hdb
......\..............\...................\div_f.root_partition.map.hbdb.sig
......\..............\...................\div_f.root_partition.map.hdb
......\..............\...................\div_f.root_partition.map.hdbx
......\..............\...................\div_f.root_partition.map.kpt
......\..............\README
......\..............\compiled_partitions

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