Based the EPM 1270 chip FPGA development board 8 SEG LED Board Verilog program has been tested normal use, the pin with a good.

8 SEG LED Board\.sopc_builder\filters.xml
...............\.............\preferences.xml
...............\db\display.amm.cdb
...............\..\display.asm.qmsg
...............\..\display.asm.rdb
...............\..\display.asm_labs.ddb
...............\..\display.cbx.xml
...............\..\display.cmp.cdb
...............\..\display.cmp.hdb
...............\..\display.cmp.kpt
...............\..\display.cmp.logdb
...............\..\display.cmp.rdb
...............\..\display.cmp0.ddb
...............\..\display.db_info
...............\..\display.fit.qmsg
...............\..\display.hier_info
...............\..\display.hif
...............\..\display.idb.cdb
...............\..\display.lpc.html
...............\..\display.lpc.rdb
...............\..\display.lpc.txt
...............\..\display.map.cdb
...............\..\display.map.hdb
...............\..\display.map.logdb
...............\..\display.map.qmsg
...............\..\display.pre_map.cdb
...............\..\display.pre_map.hdb
...............\..\display.rtlv.hdb
...............\..\display.rtlv_sg.cdb
...............\..\display.rtlv_sg_swap.cdb
...............\..\display.sgdiff.cdb
...............\..\display.sgdiff.hdb
...............\..\display.sld_design_entry.sci
...............\..\display.sld_design_entry_dsc.sci
...............\..\display.smart_action.txt
...............\..\display.sta.qmsg
...............\..\display.sta.rdb
...............\..\display.sta_cmp.5_slow.tdb
...............\..\display.syn_hier_info
...............\..\display.tis_db_list.ddb
...............\..\display.tmw_info
...............\..\logic_util_heursitic.dat
...............\..\prev_cmp_display.qmsg
...............\display.asm.rpt
...............\display.cdf
...............\display.done
...............\display.dpf
...............\display.fit.rpt
...............\display.fit.smsg
...............\display.fit.summary
...............\display.flow.rpt
...............\display.map.rpt
...............\display.map.summary
...............\display.pin
...............\display.pof
...............\display.qpf
...............\display.qsf
...............\display.sta.rpt
...............\display.sta.summary
...............\display.v
...............\display.v.bak
...............\display_assignment_defaults.qdf
...............\incremental_db\compiled_partitions\display.db_info
...............\..............\...................\display.root_partition.map.kpt
...............\..............\README
...............\seg_7.v
...............\seg_7.v.bak
...............\sel_4.v
...............\sel_4.v.bak
...............\sopc_builder_log.txt
...............\incremental_db\compiled_partitions
...............\.sopc_builder
...............\db
...............\incremental_db
8 SEG LED Board

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