VHDL ARM 32-bit register set design, based on the platform of Quartus II

project1_3\db\logic_util_heursitic.dat
..........\..\mux_3nc.tdf
..........\..\mux_joc.tdf
..........\..\prev_cmp_project1_3.asm.qmsg
..........\..\prev_cmp_project1_3.fit.qmsg
..........\..\prev_cmp_project1_3.map.qmsg
..........\..\prev_cmp_project1_3.qmsg
..........\..\prev_cmp_project1_3.sim.qmsg
..........\..\prev_cmp_project1_3.tan.qmsg
..........\..\project1_3.asm.qmsg
..........\..\project1_3.asm_labs.ddb
..........\..\project1_3.atom.rvd
..........\..\project1_3.cbx.xml
..........\..\project1_3.cmp.bpm
..........\..\project1_3.cmp.cdb
..........\..\project1_3.cmp.ecobp
..........\..\project1_3.cmp.hdb
..........\..\project1_3.cmp.kpt
..........\..\project1_3.cmp.logdb
..........\..\project1_3.cmp.rdb
..........\..\project1_3.cmp.tdb
..........\..\project1_3.cmp0.ddb
..........\..\project1_3.cmp_merge.kpt
..........\..\project1_3.db_info
..........\..\project1_3.eco.cdb
..........\..\project1_3.eds_overflow
..........\..\project1_3.fit.qmsg
..........\..\project1_3.fnsim.cdb
..........\..\project1_3.fnsim.hdb
..........\..\project1_3.fnsim.qmsg
..........\..\project1_3.hier_info
..........\..\project1_3.hif
..........\..\project1_3.lpc.html
..........\..\project1_3.lpc.rdb
..........\..\project1_3.lpc.txt
..........\..\project1_3.map.bpm
..........\..\project1_3.map.cdb
..........\..\project1_3.map.ecobp
..........\..\project1_3.map.hdb
..........\..\project1_3.map.kpt
..........\..\project1_3.map.logdb
..........\..\project1_3.map.qmsg
..........\..\project1_3.map_bb.cdb
..........\..\project1_3.map_bb.hdb
..........\..\project1_3.map_bb.logdb
..........\..\project1_3.pre_map.cdb
..........\..\project1_3.pre_map.hdb
..........\..\project1_3.rpp.qmsg
..........\..\project1_3.rtlv.hdb
..........\..\project1_3.rtlv_sg.cdb
..........\..\project1_3.rtlv_sg_swap.cdb
..........\..\project1_3.sgate.rvd
..........\..\project1_3.sgate_sm.rvd
..........\..\project1_3.sgdiff.cdb
..........\..\project1_3.sgdiff.hdb
..........\..\project1_3.sim.cvwf
..........\..\project1_3.sim.hdb
..........\..\project1_3.sim.qmsg
..........\..\project1_3.sim.rdb
..........\..\project1_3.simfam
..........\..\project1_3.sld_design_entry.sci
..........\..\project1_3.sld_design_entry_dsc.sci
..........\..\project1_3.syn_hier_info
..........\..\project1_3.tan.qmsg
..........\..\project1_3.tis_db_list.ddb
..........\..\project1_3.tmw_info
..........\..\project1_3_global_asgn_op.abo
..........\..\wed.wsf
..........\incremental_db\compiled_partitions\project1_3.root_partition.cmp.atm
..........\..............\...................\project1_3.root_partition.cmp.dfp
..........\..............\...................\project1_3.root_partition.cmp.hdbx
..........\..............\...................\project1_3.root_partition.cmp.kpt
..........\..............\...................\project1_3.root_partition.cmp.logdb
..........\..............\...................\project1_3.root_partition.cmp.rcf
..........\..............\...................\project1_3.root_partition.map.atm
..........\..............\...................\project1_3.root_partition.map.cdb
..........\..............\...................\project1_3.root_partition.map.dpi
..........\..............\...................\project1_3.root_partition.map.hdb
..........\..............\...................\project1_3.root_partition.map.hdbx
..........\..............\...................\project1_3.root_partition.map.kpt
..........\..............\README
..........\project1_3.asm.rpt
..........\project1_3.done
..........\project1_3.fit.rpt
..........\project1_3.fit.smsg
..........\project1_3.fit.summary
..........\project1_3.flow.rpt
..........\project1_3.map.rpt
..........\project1_3.map.smsg
..........\project1_3.map.summary
..........\project1_3.pin
..........\project1_3.pof
..........\project1_3.qpf
..........\project1_3.qsf
..........\project1_3.qws
..........\project1_3.sim.rpt
..........\project1_3.sof
..........\project1_3.tan.rpt
..........\project1_3.tan.summary
..........\project1_3.v

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