Directional filtering fingerprint image enhancement algorithm based on FPGA using the FPGA has a rich register resources to meet the high-speed system design, design direction filtering a pure hardware FPGA-based fingerprint image enhancement algorithm. The design uses a register-transfer level (RTL) hardware description language (Verilog HDL), time division multiplexing and pipelining technology to complete the realization of the direction of filtering fingerprint image enhancement algorithm on the FPGA.

april2010_1.pdf

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