Example content of the DE2 board demonstration hardware configuration and a large number of commonly used IP CORE pin is ideal for the novice to learn research

DE2_NIOS\.sopc_builder\filters.xml
........\.............\install.ptf
........\.............\preferences.xml
........\altpllpll_0.ppf
........\Audio_0.v
........\......DAC_FIFO\cb_generator.pl
........\..............\class.ptf
........\..............\hdl\AUDIO_DAC_FIFO.v
........\..............\...\FIFO_16_256.v
........\AUDIO_DAC_FIFO.v
........\Audio_PLL.ppf
........\Audio_PLL.v
........\bht_ram.mif
........\Binary_VGA_Controller\cb_generator.pl
........\.....................\class.ptf
........\.....................\hdl\Img_DATA.hex
........\.....................\...\Img_RAM.v
........\.....................\...\VGA_Controller.v
........\.....................\...\VGA_NIOS_CTRL.v
........\.....................\...\VGA_OSD_RAM.v
........\.....................\...\VGA_Param.h
........\.....................\inc\VGA.c
........\.....................\...\VGA.h
........\button_pio.v
........\clock_0.v
........\clock_1.v
........\cmp_state.ini
........\cpu_0.ocp
........\cpu_0.v
........\cpu_0.vo
........\cpu_0_bht_ram.mif
........\cpu_0_dc_tag_ram.mif
........\cpu_0_ic_tag_ram.mif
........\cpu_0_jtag_debug_module.v
........\cpu_0_jtag_debug_module_wrapper.v
........\cpu_0_mult_cell.v
........\cpu_0_ociram_default_contents.mif
........\cpu_0_rf_ram_a.mif
........\cpu_0_rf_ram_b.mif
........\cpu_0_test_bench.v
........\db\DE2_NIOS.db_info
........\..\DE2_NIOS.sld_design_entry.sci
........\dc_tag_ram.mif
........\DE2_Board\class.ptf
........\.........\system\.sopc_builder\install.ptf
........\.........\......\asmi.v
........\.........\......\cmp_state.ini
........\.........\......\cpu_0.ocp
........\.........\......\cpu_0.v
........\.........\......\cpu_0_test_bench.v
........\.........\......\data_RAM.hex
........\.........\......\data_RAM.v
........\.........\......\DE2_Board.asm.rpt
........\.........\......\DE2_Board.bsf
........\.........\......\DE2_Board.cdf
........\.........\......\DE2_Board.done
........\.........\......\DE2_Board.fit.eqn
........\.........\......\DE2_Board.fit.rpt
........\.........\......\DE2_Board.fit.summary
........\.........\......\DE2_Board.flow.rpt
........\.........\......\DE2_Board.map.eqn
........\.........\......\DE2_Board.map.rpt
........\.........\......\DE2_Board.map.summary
........\.........\......\DE2_Board.pin
........\.........\......\DE2_Board.pof
........\.........\......\DE2_Board.ptf
........\.........\......\DE2_Board.ptf.5.00
........\.........\......\DE2_Board.ptf.bak
........\.........\......\DE2_Board.qpf
........\.........\......\DE2_Board.qsf
........\.........\......\DE2_Board.qws
........\.........\......\DE2_Board.sof
........\.........\......\DE2_Board.tan.rpt
........\.........\......\DE2_Board.tan.summary
........\.........\......\DE2_Board.v
........\.........\......\DE2_Board_assignment_defaults.qdf
........\.........\......\DE2_Board_generation_script
........\.........\......\DE2_Board_log.txt
........\.........\......\DE2_Board_setup_quartus.tcl
........\.........\......\...........im\atail-f.pl
........\.........\......\.............\contents_file_warning.txt
........\.........\......\.............\jtag_uart_0_input_mutex.dat
........\.........\......\.............\jtag_uart_0_input_stream.dat
........\.........\......\.............\jtag_uart_0_output_stream.dat
........\.........\......\DE2_Board_top.bdf
........\.........\......\delay_reset_block.bdf
........\.........\......\firmware_ROM.hex
........\.........\......\firmware_ROM.v
........\.........\......\jtag_uart_0.v
........\.........\......\payload_buffer.hex
........\.........\......\payload_buffer.v
........\.........\......\reset_counter.v
........\.........\......\rf_ram.mif
........\.........\......\sopc_builder_debug_log.txt
........\.........\......\sysid.v
........\DE2_NIOS.asm.rpt
........\DE2_NIOS.done
........\DE2_NIOS.fit.rpt
........\DE2_NIOS.fit.smsg
........\DE2_NIOS.fit.summary

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