This article uses the example describes the crossover design using Verilog in FPGA/CPLD, including the 50 duty cycle odd divider

DIV_ODD\div_odd.qpf
.......\div_odd.qsf
.......\.b\wed.wsf
.......\..\div_odd.db_info
.......\..\prev_cmp_div_odd.map.qmsg
.......\..\div_odd.tis_db_list.ddb
.......\..\prev_cmp_div_odd.fit.qmsg
.......\..\div_odd.pre_map.cdb
.......\..\div_odd.cbx.xml
.......\..\div_odd.hif
.......\..\prev_cmp_div_odd.qmsg
.......\..\div_odd.map.qmsg
.......\..\div_odd.hier_info
.......\..\div_odd.fit.qmsg
.......\..\div_odd.cmp.logdb
.......\..\div_odd.rtlv_sg_swap.cdb
.......\..\div_odd.map_bb.logdb
.......\..\div_odd.rtlv_sg.cdb
.......\..\div_odd.pre_map.hdb
.......\..\div_odd.psp
.......\..\div_odd.sgdiff.cdb
.......\..\div_odd.sgdiff.hdb
.......\..\div_odd.asm.qmsg
.......\..\div_odd.syn_hier_info
.......\..\div_odd.sim.qmsg
.......\..\div_odd.rtlv.hdb
.......\..\div_odd.map_bb.hdbx
.......\..\div_odd.cmp.kpt
.......\..\div_odd.map.ecobp
.......\..\div_odd.map.kpt
.......\..\div_odd.cmp_merge.kpt
.......\..\div_odd.sld_design_entry_dsc.sci
.......\..\div_odd.cmp.bpm
.......\..\div_odd.map_bb.cdb
.......\..\div_odd.map_bb.hdb
.......\..\div_odd.map.cdb
.......\..\div_odd.map.hdb
.......\..\div_odd.map.logdb
.......\..\div_odd.map.bpm
.......\..\div_odd.tan.qmsg
.......\..\div_odd.cmp.cdb
.......\..\div_odd.cmp2.ddb
.......\..\div_odd.cmp.hdb
.......\..\div_odd.cmp.tdb
.......\..\div_odd.eco.cdb
.......\..\div_odd.tmw_info
.......\..\div_odd.asm_labs.ddb
.......\..\div_odd.cmp.ecobp
.......\..\div_odd.sim.hdb
.......\..\div_odd.cmp.rdb
.......\..\div_odd.eds_overflow
.......\..\div_odd.cmp0.ddb
.......\..\div_odd.sim.cvwf
.......\..\div_odd.sim.rdb
.......\..\div_odd.sld_design_entry.sci
.......\div_odd.asm.rpt
.......\incremental_db\compiled_partitions\div_odd.root_partition.map.kpt
.......\..............\...................\div_odd.root_partition.map.atm
.......\..............\...................\div_odd.root_partition.map.hdbx
.......\..............\...................\div_odd.root_partition.map.dpi
.......\..............\...................\div_odd.root_partition.cmp.rcf
.......\..............\...................\div_odd.root_partition.cmp.hdbx
.......\..............\...................\div_odd.root_partition.cmp.atm
.......\..............\...................\div_odd.root_partition.cmp.logdb
.......\..............\...................\div_odd.root_partition.cmp.dfp
.......\..............\...................\div_odd.root_partition.cmp.kpt
.......\..............\README
.......\div_odd.map.summary
.......\div_odd.flow.rpt
.......\div_odd.tan.summary
.......\div_odd.done
.......\div_odd.dpf
.......\div_odd.tan.rpt
.......\Waveform3.vwf
.......\div_odd.sim.rpt
.......\div_odd.v.bak
.......\div_odd.v
.......\div_odd.pin
.......\div_odd.fit.summary
.......\div_odd.vwf
.......\div_odd.map.rpt
.......\div_odd.fit.smsg
.......\div_odd.fit.rpt
.......\div_odd.sof
.......\div_odd.pof
.......\div_odd.qws
.......\incremental_db\compiled_partitions
.......\db
.......\incremental_db
DIV_ODD

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