the dds sine wave generator based on the FPGA cyclone III EP3C16F484C6 , frequency adjustable

dds-5\clk.v
.....\clk.v.bak
.....\clkchange.bsf
.....\Clock_Gen.v
.....\Control.bsf
.....\Control.v
.....\d.bdf
.....\DAC.bsf
.....\DAC.v
.....\DAC.v.bak
.....\ddds.bsf
.....\ddds.v
.....\ddds.v.bak
.....\dds.asm.rpt
.....\dds.bsf
.....\dds.done
.....\dds.dpf
.....\dds.fit.rpt
.....\dds.fit.smsg
.....\dds.fit.summary
.....\dds.flow.rpt
.....\dds.map.rpt
.....\dds.map.smsg
.....\dds.map.summary
.....\dds.pin
.....\dds.pof
.....\dds.qpf
.....\dds.qsf
.....\dds.sim.rpt
.....\dds.sof
.....\dds.sta.rpt
.....\dds.sta.summary
.....\dds.v.bak
.....\dds_assignment_defaults.qdf
.....\fd.vwf
.....\LCD_Control.v
.....\LCD_Driver.v
.....\rom.bsf
.....\rom.cmp
.....\ROM.mif
.....\rom.qip
.....\rom.v
.....\rom_bb.v
.....\rom_inst.v
.....\rom_wave0.jpg
.....\rom_waveforms.html
.....\sinrom.bsf
.....\sinrom.mif
.....\sinrom.v
.....\sinrom.xlsx
.....\sinrom_bb.v
.....\sinrom_wave0.jpg
.....\sinrom_waveforms.html
.....\捕获.PNG
.....\dds.qws
.....\.b\dds.db_info
.....\db
dds-5

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