Verilog-based I2C code that contains the master and slave two modules

I2C\i2c\i2c.gise
...\...\i2c.xise
...\...\i2c_master_control.v
...\...\i2c_master_top.v
...\...\i2c_slave.v
...\...\i2c_testbench.v
...\...\i2c_top.v
...\...\IIC_top.cmd_log
...\...\IIC_top.lso
...\...\IIC_top.prj
...\...\IIC_top.syr
...\...\IIC_top.xst
...\...\IIC_top_envsettings.html
...\...\IIC_top_summary.html
...\...\IIC_top_xst.xrpt
...\...\iseconfig\i2c.projectmgr
...\...\.........\IIC_top.xreport
...\...\SCL_generator.v
...\...\SDA_process.v
...\...\webtalk_pn.xml
...\...\xst\work\hdllib.ref
...\...\...\....\vlg13\_i_i_c__top.bin
...\...\...\....\...2F\_i_i_c__slave.bin
...\...\...\....\...30\_s_c_l__generator.bin
...\...\...\....\...52\_s_d_a__process.bin
...\...\...\....\...6E\_i_i_c__master__top.bin
...\...\...\....\...70\_i_i_c__master__control.bin
...\...\_xmsgs\pn_parser.xmsgs
...\...\......\xst.xmsgs
...\...\xst\dump.xst\IIC_top.prj\ngx\notopt
...\...\...\........\...........\...\opt
...\...\...\........\...........\ngx
...\...\...\........\IIC_top.prj
...\...\...\work\vlg13
...\...\...\....\vlg2F
...\...\...\....\vlg30
...\...\...\....\vlg52
...\...\...\....\vlg6E
...\...\...\....\vlg70
...\...\...\dump.xst
...\...\...\projnav.tmp
...\...\...\work
...\...\iseconfig
...\...\xst
...\...\_xmsgs
...\i2c
I2C

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