an 8 bit 8 FUNCTION ALU VHDL

alu_new\.lso
.......\alu_new.fdo
.......\alu_new.ise
.......\alu_new.ise_ISE_Backup
.......\alu_new.prj
.......\alu_new.stx
.......\alu_new.udo
.......\alu_new.vhd
.......\alu_new.xst
.......\alu_new_summary.html
.......\alu_new_tb.vhd
.......\alu_new_tb.vhd.bak
.......\alu_new_tb_vhd.fdo
.......\alu_new_tb_vhd.udo
.......\alu_new_tb_vhd_beh.prj
.......\alu_new_tb_vhd_stx.prj
.......\isim\temp\hdllib.ref
.......\....\....\hdpdeps.ref
.......\....\....\sub00\vhpl00.vho
.......\....\....\.....\vhpl01.vho
.......\....\....\.....\vhpl02.vho
.......\....\....\sub00
.......\....\temp
.......\....\work\hdllib.ref
.......\....\....\hdpdeps.ref
.......\....\....\sub00\vhpl00.vho
.......\....\....\.....\vhpl01.vho
.......\....\....\.....\vhpl02.vho
.......\....\....\sub00
.......\....\work
.......\isim
.......\pepExtractor.prj
.......\transcript
.......\vsim.wlf
.......\work\alu_new\behavioral.dat
.......\....\.......\behavioral.psm
.......\....\.......\_primary.dat
.......\....\alu_new
.......\....\......._tb_vhd\behavior.dat
.......\....\..............\behavior.psm
.......\....\..............\_primary.dat
.......\....\alu_new_tb_vhd
.......\....\_info
.......\work
.......\xilinxsim.ini
.......\.st\projnav.tmp
.......\...\work\hdllib.ref
.......\...\....\hdpdeps.ref
.......\...\....\sub00\vhpl00.vho
.......\...\....\.....\vhpl01.vho
.......\...\....\sub00
.......\...\work
.......\xst
.......\_xmsgs\fuse.xmsgs
.......\......\vhpcomp.xmsgs
.......\......\xst.xmsgs
.......\_xmsgs
.......\__ISE_repository_alu_new.ise_.lock
alu_new

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