FGPA, VHDL 16 Addition counter counts from 0 to 2 ^ 16

lab2-part1\db\logic_util_heursitic.dat
..........\..\part1.db_info
..........\..\part1.eco.cdb
..........\..\part1.sld_design_entry.sci
..........\..\prev_cmp_part1.qmsg
..........\display.vhd
..........\display.vhd.bak
..........\incremental_db\compiled_partitions\part1.root_partition.cmp.dfp
..........\..............\...................\part1.root_partition.cmp.kpt
..........\..............\...................\part1.root_partition.cmp.logdb
..........\..............\...................\part1.root_partition.map.dpi
..........\..............\...................\part1.root_partition.map.kpt
..........\..............\README
..........\part1.asm.rpt
..........\part1.cdf
..........\part1.done
..........\part1.fit.rpt
..........\part1.fit.summary
..........\part1.flow.rpt
..........\part1.jdi
..........\part1.map.rpt
..........\part1.map.summary
..........\part1.pin
..........\part1.pof
..........\part1.qpf
..........\part1.qsf
..........\part1.qws
..........\part1.sof
..........\part1.sta.rpt
..........\part1.sta.summary
..........\part1.tis_db_list.ddb
..........\part1.vhd
..........\part1.vhd.bak
..........\incremental_db\compiled_partitions
..........\db
..........\incremental_db
lab2-part1

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