A computer theory course design work, five pipelined CPU, instruction set to the code are design, the final report documents the formation of parallel division, 16-bit word length, fixed-length instructions, Verilog source code, top level design. Simple structure, conflict resolution is also very simple, a small amount of code.

流水线cpu\pipecpu\1.vwf
.........\.......\alu.v
.........\.......\alu.v.bak
.........\.......\cla32.v
.........\.......\compare.v
.........\.......\compare.v.bak
.........\.......\cpu.v
.........\.......\cpu.v.bak
.........\.......\db\altsyncram_6v91.tdf
.........\.......\..\logic_util_heursitic.dat
.........\.......\..\pipecpu.asm.qmsg
.........\.......\..\pipecpu.asm.rdb
.........\.......\..\pipecpu.cbx.xml
.........\.......\..\pipecpu.cmp.cbp
.........\.......\..\pipecpu.cmp.ecobp
.........\.......\..\pipecpu.cmp.kpt
.........\.......\..\pipecpu.cmp.rdb
.........\.......\..\pipecpu.cmp_merge.kpt
.........\.......\..\pipecpu.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
.........\.......\..\pipecpu.cuda_io_sim_cache.45um_ii_1200mv_85c_slow.hsd
.........\.......\..\pipecpu.db_info
.........\.......\..\pipecpu.eco.cdb
.........\.......\..\pipecpu.fit.qmsg
.........\.......\..\pipecpu.hier_info
.........\.......\..\pipecpu.hif
.........\.......\..\pipecpu.lpc.html
.........\.......\..\pipecpu.lpc.rdb
.........\.......\..\pipecpu.lpc.txt
.........\.......\..\pipecpu.map.bpm
.........\.......\..\pipecpu.map.cdb
.........\.......\..\pipecpu.map.ecobp
.........\.......\..\pipecpu.map.hdb
.........\.......\..\pipecpu.map.kpt
.........\.......\..\pipecpu.map.logdb
.........\.......\..\pipecpu.map.qmsg
.........\.......\..\pipecpu.map_bb.cdb
.........\.......\..\pipecpu.map_bb.hdb
.........\.......\..\pipecpu.map_bb.logdb
.........\.......\..\pipecpu.pre_map.cdb
.........\.......\..\pipecpu.pre_map.hdb
.........\.......\..\pipecpu.rtlv.hdb
.........\.......\..\pipecpu.rtlv_sg.cdb
.........\.......\..\pipecpu.rtlv_sg_swap.cdb
.........\.......\..\pipecpu.sgdiff.cdb
.........\.......\..\pipecpu.sgdiff.hdb
.........\.......\..\pipecpu.sim.cvwf
.........\.......\..\pipecpu.sim.hdb
.........\.......\..\pipecpu.sim.qmsg
.........\.......\..\pipecpu.sim.rdb
.........\.......\..\pipecpu.sld_design_entry.sci
.........\.......\..\pipecpu.sld_design_entry_dsc.sci
.........\.......\..\pipecpu.smart_action.txt
.........\.......\..\pipecpu.sta.qmsg
.........\.......\..\pipecpu.sta.rdb
.........\.......\..\pipecpu.syn_hier_info
.........\.......\..\pipecpu.tiscmp.fast_1200mv_0c.ddb
.........\.......\..\pipecpu.tiscmp.slow_1200mv_0c.ddb
.........\.......\..\pipecpu.tiscmp.slow_1200mv_85c.ddb
.........\.......\..\pipecpu.tis_db_list.ddb
.........\.......\..\prev_cmp_pipecpu.asm.qmsg
.........\.......\..\prev_cmp_pipecpu.fit.qmsg
.........\.......\..\prev_cmp_pipecpu.map.qmsg
.........\.......\..\prev_cmp_pipecpu.qmsg
.........\.......\..\prev_cmp_pipecpu.sim.qmsg
.........\.......\..\prev_cmp_pipecpu.sta.qmsg
.........\.......\..\wed.wsf
.........\.......\dff32.v
.........\.......\dff32.v.bak
.........\.......\dffe32.v
.........\.......\incremental_db\compiled_partitions\pipecpu.root_partition.cmp.cdb
.........\.......\..............\...................\pipecpu.root_partition.cmp.dfp
.........\.......\..............\...................\pipecpu.root_partition.cmp.hdb
.........\.......\..............\...................\pipecpu.root_partition.cmp.kpt
.........\.......\..............\...................\pipecpu.root_partition.cmp.logdb
.........\.......\..............\...................\pipecpu.root_partition.cmp.rcfdb
.........\.......\..............\...................\pipecpu.root_partition.cmp.re.rcfdb
.........\.......\..............\...................\pipecpu.root_partition.map.cdb
.........\.......\..............\...................\pipecpu.root_partition.map.dpi
.........\.......\..............\...................\pipecpu.root_partition.map.hdb
.........\.......\..............\...................\pipecpu.root_partition.map.kpt
.........\.......\..............\README
.........\.......\mux2x32.v
.........\.......\mux2x32.v.bak
.........\.......\mux2x5.v
.........\.......\mux2x5.v.bak
.........\.......\mux4x32.v
.........\.......\mux4x32.v.bak
.........\.......\pcdatamem.mif
.........\.......\pcinstmem.v
.........\.......\pcinstmem.v.bak
.........\.......\pipecpu.asm.rpt
.........\.......\pipecpu.done
.........\.......\pipecpu.fit.rpt
.......

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