Verilog VHDL the uart of the DE2

uart_最终版\clk_div.v
...........\cmp_state.ini
...........\db\logic_util_heursitic.dat
...........\..\prev_cmp_uart.qmsg
...........\..\uart.amm.cdb
...........\..\uart.asm.qmsg
...........\..\uart.asm.rdb
...........\..\uart.asm_labs.ddb
...........\..\uart.cbx.xml
...........\..\uart.cmp.cdb
...........\..\uart.cmp.hdb
...........\..\uart.cmp.kpt
...........\..\uart.cmp.logdb
...........\..\uart.cmp.rdb
...........\..\uart.cmp.tdb
...........\..\uart.cmp0.ddb
...........\..\uart.db_info
...........\..\uart.eda.qmsg
...........\..\uart.fit.qmsg
...........\..\uart.hier_info
...........\..\uart.hif
...........\..\uart.idb.cdb
...........\..\uart.lpc.html
...........\..\uart.lpc.rdb
...........\..\uart.lpc.txt
...........\..\uart.map.cdb
...........\..\uart.map.hdb
...........\..\uart.map.logdb
...........\..\uart.map.qmsg
...........\..\uart.pre_map.cdb
...........\..\uart.pre_map.hdb
...........\..\uart.rpp.qmsg
...........\..\uart.rtlv.hdb
...........\..\uart.rtlv_sg.cdb
...........\..\uart.rtlv_sg_swap.cdb
...........\..\uart.sgate.rvd
...........\..\uart.sgate_sm.rvd
...........\..\uart.sgdiff.cdb
...........\..\uart.sgdiff.hdb
...........\..\uart.sim.vwf
...........\..\uart.sld_design_entry.sci
...........\..\uart.sld_design_entry_dsc.sci
...........\..\uart.smart_action.txt
...........\..\uart.smp_dump.txt
...........\..\uart.syn_hier_info
...........\..\uart.tan.qmsg
...........\..\uart.tis_db_list.ddb
...........\..\uart.tmw_info
...........\..\uart_cmp.qrpt
...........\..\uart_sim.qrpt
...........\incremental_db\compiled_partitions\uart.db_info
...........\..............\...................\uart.root_partition.map.kpt
...........\..............\README
...........\serv_req_info.txt
...........\.imulation\modelsim\uart.sft
...........\..........\........\uart.vo
...........\..........\........\uart.vt
...........\..........\........\uart_modelsim.xrf
...........\..........\........\uart_v.sdo
...........\uart.asm.rpt
...........\uart.cdf
...........\uart.done
...........\uart.dpf
...........\uart.eda.rpt
...........\uart.fit.eqn
...........\uart.fit.rpt
...........\uart.fit.smsg
...........\uart.fit.summary
...........\uart.flow.rpt
...........\uart.map.eqn
...........\uart.map.rpt
...........\uart.map.smsg
...........\uart.map.summary
...........\uart.pin
...........\uart.pof
...........\uart.qpf
...........\uart.qsf
...........\uart.qsf.bak
...........\uart.qws
...........\uart.sim.rpt
...........\uart.sof
...........\uart.tan.rpt
...........\uart.tan.summary
...........\uart.v
...........\uart.vwf
...........\uart_assignment_defaults.qdf
...........\uart_rx.v
...........\uart_tx.v
...........\incremental_db\compiled_partitions
...........\simulation\modelsim
...........\db
...........\incremental_db
...........\simulation
uart_最终版

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