Introduction - If you have any usage issues, please Google them yourself
A master computing device data transmission. 2, to grasp the features and applications of the 74LS181. To learn and master the use of the CPLD device through the schematic design of the arithmetic logic unit. 1 to complete the 16 into a bit arithmetic and logic operations experiments. Completion of the pilot project, in accordance with the experimental procedures and understanding of arithmetic and logic unit is running. 2, the schematic configuration the EPM7128 the internal circuit structure it to replace the design of the separation of arithmetic and logic unit.