This program is io board fpga program, you can achieve the data communication function

IO板卡FPGA程序\BMK_fifo_read.bsf
..............\BMK_fifo_read.v
..............\BMK_fifo_read.v.bak
..............\BMK_fifo_write.bsf
..............\BMK_fifo_write.v
..............\BMK_fifo_write.v.bak
..............\BMK_receive.bsf
..............\BMK_receive.v
..............\BMK_receive.v.bak
..............\BMK_send.bsf
..............\BMK_send.v
..............\BMK_send.v.bak
..............\busmaster.bsf
..............\busmaster.vhd
..............\clk4m.bsf
..............\clk4m.vhd
..............\db\altsyncram_3nf1.tdf
..............\..\altsyncram_jte1.tdf
..............\..\altsyncram_lte1.tdf
..............\..\altsyncram_pte1.tdf
..............\..\altsyncram_thf1.tdf
..............\..\pci_all.db_info
..............\..\pci_all.eco.cdb
..............\..\pci_all.sld_design_entry.sci
..............\..\prev_cmp_pci_all.asm.qmsg
..............\..\prev_cmp_pci_all.fit.qmsg
..............\..\prev_cmp_pci_all.map.qmsg
..............\..\prev_cmp_pci_all.qmsg
..............\..\prev_cmp_pci_all.tan.qmsg
..............\incremental_db\README
..............\my_clock.bsf
..............\my_clock.v
..............\pargen.bsf
..............\pargen.v
..............\pcislave.bsf
..............\pcislave.vhd
..............\pcislave.vhd.bak
..............\pci_all.asm.rpt
..............\pci_all.bdf
..............\pci_all.cdf
..............\pci_all.done
..............\pci_all.dpf
..............\pci_all.fit.rpt
..............\pci_all.fit.smsg
..............\pci_all.fit.summary
..............\pci_all.flow.rpt
..............\pci_all.map.rpt
..............\pci_all.map.smsg
..............\pci_all.map.summary
..............\pci_all.pin
..............\pci_all.pof
..............\pci_all.qpf
..............\pci_all.qsf
..............\pci_all.qws
..............\pci_all.sof
..............\pci_all.tan.rpt
..............\pci_all.tan.summary
..............\pci_all_assignment_defaults.qdf
..............\receive_bmk.bsf
..............\receive_bmk.vhd
..............\RS232.v
..............\RS232R.v
..............\send_bmk.bsf
..............\send_bmk.vhd
..............\test.bsf
..............\test.v
..............\test.v.bak
..............\test_led.bsf
..............\test_led.v
..............\Thumbs.db
..............\undo_redo.txt
..............\incremental_db\compiled_partitions
..............\db
..............\incremental_db
IO板卡FPGA程序

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