the klt algorithm of the fpga implementation, altera company s development environment.

klt1\Dou64_to_Float32.v
....\Double_to_Float.v
....\Fixed_to_Float64.v
....\Float_Mul_32_32_32.v
....\Float_to_Fixed64.v
....\ImgRom0.v
....\ImgRom1.v
....\Int_Conv_buff.v
....\Mem_16K_32b.v
....\Mem_off_chip.v
....\signedmult.v
....\Sqrt_64_32.v
....\Sub_float.v
....\Accumulator.vhd
....\Adder_float.vhd
....\Comparer_float.vhd
....\Divider_32_64_32.vhd
....\Dou64_to_Float32.vhd
....\Double_to_Float.vhd
....\DualPortMem.vhd
....\Eigenvalue_computing.vhd
....\Feature_extract.vhd
....\FIFO_Regs.vhd
....\FIFO_Regs_16.vhd
....\Fixed_to_Float64.vhd
....\Float_Mul_32_32_32.vhd
....\Float_to_Fixed64.vhd
....\GxGy_Pixwise_Process.vhd
....\ImgRom0.vhd
....\ImgRom1.vhd
....\Int_Conv_buff.vhd
....\Mem_16K_32b.vhd
....\Mem_off_chip.vhd
....\MotionTracker.vhd
....\MotionTrackerTest.vhd
....\Multiplier32_32_64.vhd
....\Multiplier_32bit.vhd
....\OneD_Conv_Operator_32b.vhd
....\OneD_Convolver.vhd
....\RegionMaxSelect.vhd
....\signedmult.vhd
....\Sqrt_64_32.vhd
....\Sub_float.vhd
....\top_tb.vhd
....\Win_Acc_perCh.vhd
....\Adder_float.v
....\Comparer_float.v
....\Divider_32_64_32.v
klt1

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