Based on the the quartus platform, the SDRAM controller design (Verilog source code)

altera_sdram\altera_mf.v
............\db\altsyncram_48p3.tdf
............\..\altsyncram_65p3.tdf
............\..\altsyncram_u4p3.tdf
............\..\cmpr_5cc.tdf
............\..\cmpr_8cc.tdf
............\..\cmpr_bcc.tdf
............\..\cmpr_ccc.tdf
............\..\cntr_02j.tdf
............\..\cntr_3ci.tdf
............\..\cntr_7ci.tdf
............\..\cntr_gui.tdf
............\..\cntr_ndi.tdf
............\..\cntr_sbi.tdf
............\..\decode_rqf.tdf
............\..\mux_aoc.tdf
............\..\prev_cmp_sdram_control_top.asm.qmsg
............\..\prev_cmp_sdram_control_top.eda.qmsg
............\..\prev_cmp_sdram_control_top.fit.qmsg
............\..\prev_cmp_sdram_control_top.map.qmsg
............\..\prev_cmp_sdram_control_top.qmsg
............\..\prev_cmp_sdram_control_top.tan.qmsg
............\..\sdram_control_top.asm.qmsg
............\..\sdram_control_top.asm_labs.ddb
............\..\sdram_control_top.cbx.xml
............\..\sdram_control_top.cmp.bpm
............\..\sdram_control_top.cmp.cdb
............\..\sdram_control_top.cmp.ecobp
............\..\sdram_control_top.cmp.hdb
............\..\sdram_control_top.cmp.kpt
............\..\sdram_control_top.cmp.logdb
............\..\sdram_control_top.cmp.rdb
............\..\sdram_control_top.cmp.tdb
............\..\sdram_control_top.cmp0.ddb
............\..\sdram_control_top.cmp2.ddb
............\..\sdram_control_top.cmp_merge.kpt
............\..\sdram_control_top.db_info
............\..\sdram_control_top.eco.cdb
............\..\sdram_control_top.eda.qmsg
............\..\sdram_control_top.fit.qmsg
............\..\sdram_control_top.hier_info
............\..\sdram_control_top.hif
............\..\sdram_control_top.lpc.html
............\..\sdram_control_top.lpc.rdb
............\..\sdram_control_top.lpc.txt
............\..\sdram_control_top.map.bpm
............\..\sdram_control_top.map.cdb
............\..\sdram_control_top.map.ecobp
............\..\sdram_control_top.map.hdb
............\..\sdram_control_top.map.kpt
............\..\sdram_control_top.map.logdb
............\..\sdram_control_top.map.qmsg
............\..\sdram_control_top.map_bb.cdb
............\..\sdram_control_top.map_bb.hdb
............\..\sdram_control_top.map_bb.logdb
............\..\sdram_control_top.pre_map.cdb
............\..\sdram_control_top.pre_map.hdb
............\..\sdram_control_top.rtlv.hdb
............\..\sdram_control_top.rtlv_sg.cdb
............\..\sdram_control_top.rtlv_sg_swap.cdb
............\..\sdram_control_top.sgdiff.cdb
............\..\sdram_control_top.sgdiff.hdb
............\..\sdram_control_top.sld_design_entry.sci
............\..\sdram_control_top.sld_design_entry_dsc.sci
............\..\sdram_control_top.smp_dump.txt
............\..\sdram_control_top.syn_hier_info
............\..\sdram_control_top.tan.qmsg
............\..\sdram_control_top.tis_db_list.ddb
............\..\sdram_control_top_global_asgn_op.abo
............\incremental_db\compiled_partitions\sdram_control_top.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.atm
............\..............\...................\sdram_control_top.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.hdbx
............\..............\...................\sdram_control_top.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.kpt
............\..............\...................\sdram_control_top.autos_3e92b2e5d298f5cf757a393f7655ccd81.map.logdb
............\..............\...................\sdram_control_top.root_partition.cmp.atm
............\..............\...................\sdram_control_top.root_partition.cmp.dfp
............\..............\...................\sdram_control_top.root_partition.cmp.hdbx
............\..............\...................\sdram_control_top.root_partition.cmp.kpt
............\..............\...................\sdram_control_top.root_partition.cmp.logdb
............\..............\...................\sdram_control_top.root_partition.cmp.rcf
............\..............\...................\sdram_control_top.root_partition.map.atm
............\..............\...................\sdram_control_top.root_partition.map.dpi
............\..............\......

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