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VHDL_Traffic-Light

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 746kb
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  • Author :哲**
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The design task: simulate the crossroads of the working process of the traffic lights, the use of the experimental board two sets of red, yellow and green LED traffic lights, to design a traffic signal controller. Requirements: (1) traffic lights from green to red, four seconds of yellow light interval (2) traffic lights red to green directly, there is no interval (3) on the main road green time of 40 seconds, the branch roads of the green time of 20 seconds (4) at any time, each state to the state to the end of the time required.
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基于VHDL的交通灯设计(EDA课程设计报告).doc
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