This about the verilog how-to tutorials, for beginners to learn later has very great help role.

VERILOG\09062517330bfe2de56312c9aa.pdf
.......\1fda6bdb-405a-445e-923e-84094ce0b9cd.rar
.......\7_4617.pdf
.......\bc16ff26-4162-410e-a5eb-b4d1b4286df1.rar
.......\Quartus操作指南.ppt
.......\Verilog HDL 华为入门教程.pdf
.......\Verilog HDL 综合实用教程.pdf
.......\Verilog HDL-chinaitlab教程.pdf
.......\verilog.rar
.......\Verilog_golden中文版.pdf
.......\Verilog语言.pdf
.......\卡内基梅陇大学verilog课程讲义.pdf
.......\工程\BS-UL088II EPM240T100C5N U300 V2.0.rar
.......\....\readme.txt
.......\VERILOG快速入门\Verilog HDL练习题.pdf
.......\...............\Verilog基础知识.pdf
.......\verilog\Ethernet IP core(Verilog).rar
.......\.......\fpga实现jpeg Verilog源代码.rar
.......\.......\HDL的可综合设计简介.rar
.......\.......\I2C 控制器的 Verilog源程序.rar
.......\.......\PCI总线仲裁参考设计Verilog代码.rar
.......\.......\PS2 驱动(Verilog HDL).rar
.......\.......\Verilog and VHDL状态机设计.rar
.......\.......\Verilog HDL Test Bench Primer.rar
.......\.......\Verilog HDL Test Bench入门.rar
.......\.......\Verilog HDL 综合实用教程.rar
.......\.......\verilog hdl从算法设计到硬件逻辑的实现.rar
.......\.......\Verilog HDL入门教程.mht
.......\.......\VERILOG HDL快速入门 (中文）.zip
.......\.......\Verilog 程序例子.rar
.......\.......\verilog_tech.rar
.......\.......\Verilog学习笔记.mht
.......\.......\Verilog实验练习与语法手册.rar
.......\.......\Verilog黄金指南中文版.rar
.......\.......\VGA LCD 控制器IP.rar
.......\.......\卡内基梅陇大学Verilog课程讲义.rar
.......\.......\可综合的Verilog语法.rar
.......\.......\数字边沿鉴相器 verilog源程序.rar
.......\.......\数字集成电路设计入门-从HDL到版图.rar
.......\.......\曼彻斯特编解码Verilog代码.rar
.......\.......\浅析Verilog HDL硬件语义.rar
.......\.......\用verilog设计密勒解码器.rar
.......\source\examples.pdf
.......\......\chap9\bidir.v
.......\......\.....\bidir2.v
.......\......\.....\code_83.v
.......\......\.....\decode47.v
.......\......\.....\decoder_38.v
.......\......\.....\dff.v
.......\......\.....\dff1.v
.......\......\.....\dff2.v
.......\......\.....\encoder8_3.v
.......\......\.....\gate1.v
.......\......\.....\gate2.v
.......\......\.....\gate3.v
.......\......\.....\jk_ff.v
.......\......\.....\johnson.v
.......\......\.....\latch_1.v
.......\......\.....\latch_2.v
.......\......\.....\latch_8.v
.......\......\.....\mac.v
.......\......\.....\mac_tp.v
.......\......\.....\map_lpm_ram.v
.......\......\.....\mpc.v
.......\......\.....\mpc_tp.v
.......\......\.....\mux_case.v
.......\......\.....\mux_if.v
.......\......\.....\parity.v
.......\......\.....\ram256x8.v
.......\......\.....\reg8.v
.......\......\.....\rom.v
.......\......\.....\serial_pal.v
.......\......\.....\shifter.v
.......\......\.....\tri_1.v
.......\......\.....\tri_2.v
.......\......\.....\updown_count.v
.......\......\....8\add8_tp.v
.......\......\.....\carry_udp.v
.......\......\.....\carry_udpx1.v
.......\......\.....\carry_udpx2.v
.......\......\.....\count8_tp.v
.......\......\.....\delay.v
.......\......\.....\dff.v
.......\......\.....\dff_udp.v
.......\......\.....\latch.v
.......\......\.....\mult_tp.v
.......\......\.....\mux31.v
.......\......\.....\mux_tp.v
.......\......\.....\random_tp.v
.......\......\.....\rom.v
.......\......\.....\test1.v
.......\......\.....\test2.v
.......\......\.....\time_dif.v
.......\......\....7\add4_1.v
.......\......\.....\add4_2.v
.......\......\.....\add4_3.v
.......\......\.....\count4.v
.......\......\.....\full_add1.v
.......\......\.....\full_add2.v
.......\......\.....\full_add3.v

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