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shuzizhong2.0

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 378kb
  • Downloaded :0次
  • Author :康***
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
This is a EDA course design, a digital clock program, to regular, and set the alarm clock.
Packet file list
(Preview for download)
shuzizhong2.0
.............\db
.............\..\prev_cmp_TOP.asm.qmsg
.............\..\prev_cmp_TOP.fit.qmsg
.............\..\prev_cmp_TOP.map.qmsg
.............\..\prev_cmp_TOP.qmsg
.............\..\prev_cmp_TOP.tan.qmsg
.............\..\TOP.asm.qmsg
.............\..\TOP.cbx.xml
.............\..\TOP.cmp.bpm
.............\..\TOP.cmp.cdb
.............\..\TOP.cmp.ecobp
.............\..\TOP.cmp.hdb
.............\..\TOP.cmp.logdb
.............\..\TOP.cmp.rdb
.............\..\TOP.cmp.tdb
.............\..\TOP.cmp0.ddb
.............\..\TOP.cmp_bb.cdb
.............\..\TOP.cmp_bb.dfp
.............\..\TOP.cmp_bb.hdb
.............\..\TOP.cmp_bb.logdb
.............\..\TOP.cmp_bb.rcf
.............\..\TOP.dbp
.............\..\TOP.db_info
.............\..\TOP.eco.cdb
.............\..\TOP.fit.qmsg
.............\..\TOP.hier_info
.............\..\TOP.hif
.............\..\TOP.map.bpm
.............\..\TOP.map.cdb
.............\..\TOP.map.ecobp
.............\..\TOP.map.hdb
.............\..\TOP.map.logdb
.............\..\TOP.map.qmsg
.............\..\TOP.map_bb.cdb
.............\..\TOP.map_bb.hdb
.............\..\TOP.map_bb.logdb
.............\..\TOP.pre_map.cdb
.............\..\TOP.pre_map.hdb
.............\..\TOP.psp
.............\..\TOP.pss
.............\..\TOP.rtlv.hdb
.............\..\TOP.rtlv_sg.cdb
.............\..\TOP.rtlv_sg_swap.cdb
.............\..\TOP.sgdiff.cdb
.............\..\TOP.sgdiff.hdb
.............\..\TOP.signalprobe.cdb
.............\..\TOP.sld_design_entry.sci
.............\..\TOP.sld_design_entry_dsc.sci
.............\..\TOP.syn_hier_info
.............\..\TOP.tan.qmsg
.............\..\TOP_global_asgn_op.abo
.............\incremental_db
.............\..............\compiled_partitions
.............\..............\...................\TOP.root_partition.cmp.atm
.............\..............\...................\TOP.root_partition.cmp.dfp
.............\..............\...................\TOP.root_partition.cmp.hdbx
.............\..............\...................\TOP.root_partition.cmp.kpt
.............\..............\...................\TOP.root_partition.cmp.logdb
.............\..............\...................\TOP.root_partition.cmp.rcf
.............\..............\...................\TOP.root_partition.map.atm
.............\..............\...................\TOP.root_partition.map.dpi
.............\..............\...................\TOP.root_partition.map.hdbx
.............\..............\...................\TOP.root_partition.map.kpt
.............\..............\README
.............\prev_cmp_TOP.qmsg
.............\TOP.asm.rpt
.............\TOP.cdf
.............\TOP.done
.............\TOP.fit.rpt
.............\TOP.fit.smsg
.............\TOP.fit.summary
.............\TOP.flow.rpt
.............\TOP.map.rpt
.............\TOP.map.summary
.............\TOP.pin
.............\TOP.pof
.............\TOP.qpf
.............\TOP.qsf
.............\TOP.sof
.............\TOP.tan.rpt
.............\TOP.tan.summary
.............\TOP.vhd
.............\TOP.vhd.bak
.............\TOP_assignment_defaults.qdf
.............\undo_redo.txt
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