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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 60kb
  • Downloaded :0次
  • Author :李***
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Introduction - If you have any usage issues, please Google them yourself
FPGA Implementation of the electronic clock function, including the timing, display the date, set the alarm, switch 12/24 hour system.
Packet file list
(Preview for download)
watch\adjust_clock.vhd
.....\adjust_time.vhd
.....\alarm_open.vhd
.....\count_time.vhd
.....\date_ctrl.vhd
.....\digital_watch.vhd
.....\dis_date.vhd
.....\divider.vhd
.....\FPGA各模块实现的说明.docx
.....\in_put.vhd
.....\scan_display.vhd
.....\state_ctrl.vhd
.....\stop_watch.vhd
.....\wave_genera.vhd
.....\weektrans.vhd
watch
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