The multi-function digital clock VHDL language design: (1) timing function: This is the basic functions of the design of the timer tick once every one minute, and the current time displayed on the screen. (2) Alarm function: If the current time and set the alarm time, the speaker beeps. (3) set a new timer time: use the number keys 0 to 9 to enter a new time, and then press the "TIME" button to confirm. (4) set a new alarm time: the user to enter a new time, using the number keys "0" to "9" and then press the "ALARM" button to confirm. The process is similar to (3). (5) set the alarm time: the normal time display, the user directly pressing the "ALARM" key already set the alarm time will be displayed on the screen.

clock1\clock2.asm.rpt
......\clock2.done
......\clock2.fit.rpt
......\clock2.fit.smsg
......\clock2.fit.summary
......\clock2.flow.rpt
......\clock2.map.rpt
......\clock2.map.summary
......\clock2.pin
......\clock2.qpf
......\clock2.qsf
......\clock2.qws
......\clock2.sta.rpt
......\clock2.sta.summary
......\CONTROL.bsf
......\CONTROL.vhd
......\CONTROL.vhd.bak
......\COUNTER.bsf
......\COUNTER.vhd
......\COUNTER.vhd.bak
......\db\clock2.analyze_file.qmsg
......\..\clock2.asm.qmsg
......\..\clock2.cbx.xml
......\..\clock2.cmp.bpm
......\..\clock2.cmp.cdb
......\..\clock2.cmp.ecobp
......\..\clock2.cmp.hdb
......\..\clock2.cmp.logdb
......\..\clock2.cmp.rdb
......\..\clock2.cmp_bb.cdb
......\..\clock2.cmp_bb.hdb
......\..\clock2.cmp_bb.logdb
......\..\clock2.cmp_bb.rcf
......\..\clock2.dbp
......\..\clock2.db_info
......\..\clock2.eco.cdb
......\..\clock2.fit.qmsg
......\..\clock2.hier_info
......\..\clock2.hif
......\..\clock2.map.bpm
......\..\clock2.map.cdb
......\..\clock2.map.ecobp
......\..\clock2.map.hdb
......\..\clock2.map.logdb
......\..\clock2.map.qmsg
......\..\clock2.map_bb.cdb
......\..\clock2.map_bb.hdb
......\..\clock2.map_bb.logdb
......\..\clock2.pre_map.cdb
......\..\clock2.pre_map.hdb
......\..\clock2.psp
......\..\clock2.pss
......\..\clock2.rtlv.hdb
......\..\clock2.rtlv_sg.cdb
......\..\clock2.rtlv_sg_swap.cdb
......\..\clock2.sgdiff.cdb
......\..\clock2.sgdiff.hdb
......\..\clock2.signalprobe.cdb
......\..\clock2.sld_design_entry.sci
......\..\clock2.sld_design_entry_dsc.sci
......\..\clock2.sta.qmsg
......\..\clock2.sta.rdb
......\..\clock2.syn_hier_info
......\..\clock2.tiscmp0.ddb
......\..\clock2.tiscmp2.ddb
......\..\prev_cmp_clock2.map.qmsg
......\DIVIDER.bsf
......\DIVIDER.vhd
......\DIVIDER.vhd.bak
......\DRIVER.bsf
......\DRIVER.vhd
......\DRIVER.vhd.bak
......\KEYBUFFER.bsf
......\KEYBUFFER.vhd
......\KEYBUFFER.vhd.bak
......\Mult_Clk.vhd
......\prev_cmp_clock2.qmsg
......\P_ALARM.vhd
......\P_ALARM.vhd.bak
......\REG.bsf
......\REG.vhd
......\REG.vhd.bak
......\db
clock1
......\多功能数字钟设计.doc

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