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CarryLA_Adder

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2012-11-26
  • Size : 44kb
  • Downloaded :0次
  • Author :Sen****
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Introduction - If you have any usage issues, please Google them yourself
carry look ahead adder in verilog
Packet file list
(Preview for download)
CarryLA_Adder\CarryLA_Adder.gise
.............\CarryLA_Adder.ise
.............\CarryLA_Adder.xise
.............\............._xdb\tmp\ise\version
.............\.................\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
.............\.................\...\...\............\..................\.........\HDProject_StrTbl
.............\.................\...\...\............\..................\__stored_object_table__
.............\.................\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
.............\.................\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.............\.................\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
.............\.................\...\...\............\................\................\dpm_project_main_StrTbl
.............\.................\...\...\............\................Gui\CViewSelector
.............\.................\...\...\............\...................\CViewSelector_StrTbl
.............\.................\...\...\............\...................\File-SynthesisOnly
.............\.................\...\...\............\...................\File-SynthesisOnly_StrTbl
.............\.................\...\...\............\...................\Library-SynthesisOnly
.............\.................\...\...\............\...................\Library-SynthesisOnly_StrTbl
.............\.................\...\...\............\...................\Process-BehavioralSim-
.............\.................\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG
.............\.................\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG_StrTbl
.............\.................\...\...\............\...................\Process-BehavioralSim-_StrTbl
.............\.................\...\...\............\...................\Process-SynthesisOnly-
.............\.................\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG
.............\.................\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl
.............\.................\...\...\............\...................\Process-SynthesisOnly-_StrTbl
.............\.................\...\...\............\...................\Source-BehavioralSim-AutoCompile
.............\.................\...\...\............\...................\Source-BehavioralSim-AutoCompile_StrTbl
.............\.................\...\...\............\...................\Source-SynthesisOnly-AutoCompile
.............\.................\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl
.............\.................\...\...\............\xreport\Gc_RvReportViewer-Current-Module
.............\.................\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
.............\.................\...\...\............\.......\Gc_RvReportViewer-Module-Data-cla
.............\.................\...\...\............\.......\Gc_RvReportViewer-Module-Data-cla_StrTbl
.............\.................\...\...\............\.......\Gc_RvReportViewer-Module-Data-CLH_Adder
.............\.................\...\...\............\.......\Gc_RvReportViewer-Module-Data-CLH_Adder_StrTbl
.............\.................\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
.............\.................\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
.............\.................\...\...\..REGISTRY__\Autonym\regkeys
.............\.................\...\...\............\bitgen\regkeys
.............\.................\...\...\............\...init\regkeys
.............\.................\...\...\............\common\regkeys
.............\.................\...\...\............\.pldfit\regkeys
.............\.................\...\...\............\dumpngdio\regkeys
.............\.................\...\...\............\fuse\regkeys
.............\.................\...\...\............\HierarchicalDesign\HDProject\regkeys
.............\................
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