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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 350kb
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  • Author :ra***
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Introduction - If you have any usage issues, please Google them yourself
uart code with testing the waveform
Packet file list
(Preview for download)
UART
....\readmefile.txt
....\test plan _aj_uk_hisham.docx
....\test plan _aj_uk_hk.pdf
....\uart
....\....\4bit_counter.vhd
....\....\final.vhd
....\....\p2sshifter.vhd
....\....\test.wlf
....\....\test4transmitter.vhd
....\....\testuart.wlf
....\....\test_counter.vhd
....\....\test_final.vhd
....\....\test_receiver.vhd
....\....\test_shifter.vhd
....\....\test_verification4final.vhd
....\....\transcript
....\....\transmitter.vhd
....\....\uart.do
....\....\uart.lst
....\....\uart.wlf
....\....\uart1.wlf
....\....\uartfinal.do
....\....\uart_counter.do
....\....\uart_p2sshifter.do
....\....\uart_receiver.do
....\....\uart_receiver.vhd
....\....\uart_transmitter.do
....\....\verification4final.vhd
....\....\verification_final.vhd
....\....\vsim.wlf
....\....\wlft65hhet
....\....\wlftkjq456
....\....\work
....\....\....\counter
....\....\....\.......\behav_counter.dat
....\....\....\.......\behav_counter.dbs
....\....\....\.......\_primary.dat
....\....\....\.......\_primary.dbs
....\....\....\final
....\....\....\.....\behavioral.dat
....\....\....\.....\behavioral.dbs
....\....\....\.....\_primary.dat
....\....\....\.....\_primary.dbs
....\....\....\p2sshifter
....\....\....\..........\behavioral.dat
....\....\....\..........\behavioral.dbs
....\....\....\..........\_primary.dat
....\....\....\..........\_primary.dbs
....\....\....\test4transmitter
....\....\....\................\behavior.dat
....\....\....\................\behavior.dbs
....\....\....\................\_primary.dat
....\....\....\................\_primary.dbs
....\....\....\test_counter
....\....\....\............\behavior.dat
....\....\....\............\behavior.dbs
....\....\....\............\_primary.dat
....\....\....\............\_primary.dbs
....\....\....\test_final_vhd
....\....\....\..............\behavior.dat
....\....\....\..............\behavior.dbs
....\....\....\..............\_primary.dat
....\....\....\..............\_primary.dbs
....\....\....\test_receiver_vhd
....\....\....\.................\behavior.dat
....\....\....\.................\behavior.dbs
....\....\....\.................\_primary.dat
....\....\....\.................\_primary.dbs
....\....\....\test_shifter_vhd
....\....\....\................\behavior.dat
....\....\....\................\behavior.dbs
....\....\....\................\_primary.dat
....\....\....\................\_primary.dbs
....\....\....\test_verification4final
....\....\....\.......................\behavior.dat
....\....\....\.......................\behavior.dbs
....\....\....\.......................\_primary.dat
....\....\....\.......................\_primary.dbs
....\....\....\transcript
....\....\....\transmitter
....\....\....\...........\behav_transmitter.dat
....\....\....\...........\behav_transmitter.dbs
....\....\....\...........\_primary.dat
....\....\....\...........\_primary.dbs
....\....\....\uart_receiver
....\....\....\.............\behavioral.dat
....\....\....\.............\behavioral.dbs
....\....\....\.............\_primary.dat
....\....\....\.............\_primary.dbs
....\....\....\verification4final
....\....\....\..................\behavior.dat
....\....\....\..................\behavior.dbs
....\....\....\..................\_primary.dat
....\....\....\..................\_primary.dbs
....\....\....\verification_final
....\....\....\..................\behavior.dat
....\....\....\..................\behavior.dbs
....\....\....\..................\_primary.dat
....\....\....\..................\_primary.dbs
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